Patents by Inventor Masud M. Reza

Masud M. Reza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140351470
    Abstract: In accordance with at least some embodiments, a system includes an aggregator backplane coupled to a plurality of fans and power supplies and configured to consolidate control and monitoring for the plurality of fans and power supplies. The system also includes a plurality of compute nodes coupled to the aggregator backplane, wherein each compute node selectively communicates with the aggregator backplane via a corresponding interposer board. Each interposer board is configured to translate information passed between its corresponding compute node and the aggregator backplane.
    Type: Application
    Filed: August 13, 2014
    Publication date: November 27, 2014
    Inventors: Darren CEPULIS, Masud M. REZA, Michael STEARNS, Chanh V. HUA
  • Patent number: 8832348
    Abstract: In accordance with at least some embodiments, a system (100) includes an aggregator backplane (124) coupled to a plurality of fans (120A-120N) and power supplies (122A-122N) and configured to consolidate control and monitoring for the plurality of fans (120A-120N) and power supplies (122A-122N). The system (100) also includes a plurality of compute nodes (102A-102N) coupled to the aggregator backplane (124), wherein each compute node (102A-102N) selectively communicates with the aggregator backplane (124) via a corresponding interposer board (130A-130N). Each interposer board (130A-130N) is configured to translate information passed between its corresponding compute node (102A-102N) and the aggregator backplane (124).
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: September 9, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Darren J. Cepulis, Masud M. Reza, Michael Stearns, Chanh V. Hua
  • Patent number: 8427285
    Abstract: A server computer system includes a set of visual indicators for representing status of one or more data storage devices that are connected to one or more nodes of the server system. Control circuitry has at least first and second bus interfaces and is configured to set the state of the visual indicators responsive to signals received through the bus interfaces, and to operate in at least first and second configurable modes. In the first mode, both of the first and the second bus interfaces communicate with a single node. In the second mode, the first bus interface communicates with a first node and the second bus interface communicates with a second node.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: April 23, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Larry E Wilson, Masud M Reza, Hank Dao
  • Publication number: 20120131249
    Abstract: In accordance with at least some embodiments, a system (100) includes an aggregator backplane (124) coupled to a plurality of fans (120A-120N) and power supplies (122A-122N) and configured to consolidate control and monitoring for the plurality of fans (120A-120N) and power supplies (122A-122N). The system (100) also includes a plurality of compute nodes (102A-102N) coupled to the aggregator backplane (124), wherein each compute node (102A-102N) selectively communicates with the aggregator backplane (124) via a corresponding interposer board (130A-130N). Each interposer board (130A-130N) is configured to translate information passed between its corresponding compute node (102A-102N) and the aggregator backplane (124).
    Type: Application
    Filed: January 29, 2010
    Publication date: May 24, 2012
    Inventors: Darren Cepulis, Masud M. Reza, Michael Stearns, Chanh V. Hua
  • Publication number: 20110267188
    Abstract: A server computer system includes a set of visual indicators for representing status of one or more data storage devices that are connected to one or more nodes of the server system. Control circuitry has at least first and second bus interfaces and is configured to set the state of the visual indicators responsive to signals received through the bus interfaces, and to operate in at least first and second configurable modes. In the first mode, both of the first and the second bus interfaces communicate with a single node. In the second mode, the first bus interface communicates with a first node and the second bus interface communicates with a second node.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 3, 2011
    Inventors: Larry E. Wilson, Masud M. Reza, Hank Dao