Abstract: The present invention provides a zinc oxide-based ultraviolet light emitting material showing intense emission in the ultraviolet region. The present invention is an ultraviolet light emitting material containing: zinc and oxygen as main components; at least one element selected from the group consisting of aluminum, gallium, and indium, as a first sub-component; and phosphorus as a second sub-component. This material has n-type conductivity.

Abstract: Provided is a semiconductor element including a p-type semiconductor layer that is used in combination with an n-type ZnO-based semiconductor layer, and that can be formed, even at relatively low temperature, to have a small thickness, high crystallinity, and surface smoothness. The semiconductor element is expected to achieve high performance when used for a large-screen display. Specifically, the semiconductor element includes: a glass substrate; a lower electrode; a ZnO active layer (n-type semiconductor layer) having a thickness of 2 um to 4 um; a p-type ZnNiO layer (first p-type semiconductor layer) made of a p-type semiconductor material of Zn0.5Ni0.5O and having a thickness of 200 nm to 400 nm; a p-type NiO layer (second p-type semiconductor layer); and an upper electrode made of a transparent electrode material such as ITO, which are sequentially formed in the stated order.

Abstract: The present invention provides a zinc oxide-based ultraviolet light emitting material showing intense emission in the ultraviolet region. The present invention is an ultraviolet light emitting material containing: zinc and oxygen as main components; at least one element selected from the group consisting of aluminum, gallium, and indium, as a first sub-component; and phosphorus as a second sub-component. This material has n-type conductivity.

Abstract: The present invention provides a plasma display panel driving method and a plasma display device, each of which is capable of securing image quality and realizing an improvement of a drive margin and a reduction in power consumption even in the case of an ultra high definition panel. The present invention divides a plurality of display electrode pairs into a plurality of display electrode pair groups. For each of the display electrode pair groups, the present invention divides one field period into a plurality of sub-fields, each including an address period and a sustain period, such that the address periods with respect to the display electrode pair groups do not overlap one another, the address period being a period in which an address process of causing address discharge in the discharge cell which should emit light is carried out, the sustain period being a period in which first and second sustain pulses are applied to a scan electrode and a sustain electrode.

Abstract: In a driving method of a plasma display panel of the present invention, plural display electrode pairs are divided into plural display electrode pair groups and one field is divided into plural sub-fields. The length of the sustain period is compared to the length of the erase period. If the sustain period is longer than the erase period, sustain discharge and erase discharge are performed for each of the display electrode pair groups, while if the sustain period is shorter than the erase period, sustain discharge and erase discharge of one display electrode pair group are synchronized with those of another display electrode pair group. For a sub-field with a largest luminance weight or a sub-field with a highest lighting ratio, sustain discharge and erase discharge of one display electrode pair group are synchronized with those of another display electrode pair group without fail.

Abstract: A simple, low cost drive circuit secures a sufficient number of subfields in a high resolution panel. The plasma display panel drive circuit groups plural sustain electrodes into first and second sustain electrode groups, and applies sustain pulses in the sustain period. The first and second sustain pulse generating circuits generate and apply sustain pulses to first and second electrode paths. First and second specific voltage application circuits apply a first specific voltage to the first and second electrode paths. The voltage selection circuit selects one of a plurality of voltages including at least a second specific voltage and a third specific voltage, and generates a selected voltage. The first and second sustain pulse generating circuits generate the sustain pulses based on the second specific voltage when the selected voltage is the second specific voltage, and when the selected voltage is the third specific voltage, apply the third specific voltage to the first and second electrode paths.

Abstract: A plasma display panel drive circuit assures a sufficient number of subfields in a high resolution panel, is low cost, and is resistant to producing brightness differences. The plasma display panel drive circuit segments plural sustain electrodes into a first sustain electrode group and second sustain electrode group, applies sustain pulses in the sustain period, and includes the following devices: a sustain pulse generating circuit that generates sustain pulses; a specific voltage application circuit that applies a specific voltage to a first electrode path to the first sustain electrode group, and a second electrode path to the second sustain electrode group, at respective specific times; and a separation switch circuit that is connected between the sustain pulse generating circuit and the first electrode path and second electrode path, and electrically isolates the sustain pulse generating circuit from either the first electrode path or the second electrode path.

Abstract: A plurality of display electrode pairs are divided into two display electrode pair groups I and II. One field is divided into M (M is an integer of 2 or more) sub-fields SFL (L=1 to M) each including a wall voltage adjusting period, an address period, and a sustain period. Based on a sustain period T1 of a K-th sub-field SFK and a wall voltage adjusting period T2 positioned between the sustain period T1 and the address period of a (K+1)-th sub-field, if T1>T2, a first driving method in which the sustain period T1 and the wall voltage adjusting period T2 are set for each of the display electrode pair groups I and II is used in the sub-field SFK, and if T1<T2, a second driving method in which the sustain periods T1 are set so as to be synchronized with each other and the wall voltage adjusting periods T2 are set so as to be synchronized with each other among the display electrode pair groups I and II is used in the sub-field SFK.

Abstract: An object is to provide a method for driving a PDP, which may be a super high-definition panel, and a PDP device capable of assuring the sufficient number of subfields to maintain the image quality and displaying images with the sufficient luminance. To achieve the above object, one field period is divided into a plurality of subfields each having an address period and a sustain period. A plurality of display electrode pairs are divided in to a plurality N of display electrode pair groups. A start time point of a subfield is set for each display electrode pair group. When a time required for performing one address operation on all the discharge cells of the panel is represented by Tw, the time length of a sustain period of each of the subfields in each of the display electrode pair groups is defined not to exceed Tw×(N?1)/N.

Abstract: A method of driving a plasma display panel of the present invention, is a driving method of a display panel including plural display electrode pairs (24) each including a scan electrode (22) and a sustain electrode (23) extending along each other, plural data electrodes (32) crossing the plural display electrode pairs (24) and discharge cells respectively formed at positions where the display electrode pairs (24) and the data electrodes (32) cross each other.

Abstract: In the case of driving a plasma display panel for one field using a plurality of sub-fields each having a reset period in which reset discharge is generated in a discharge cell, an address period in which address discharge is generated in the discharge cell, and a sustain period in which sustain discharge is generated in the discharge cell, in a former period of the reset period, a rising ramp waveform voltage is applied to the scan electrodes, and a first voltage (Ve1) is applied to the sustain electrodes, and in a latter period of the reset period, a falling ramp waveform voltage is applied to the scan electrodes, and a second voltage (Ve2) higher than the first voltage (Ve1), a rising ramp waveform voltage rising from the second voltage (Ve2) to a third voltage (Ve3) higher than the second voltage (Ve2), and the third voltage (Ve3) are sequentially applied to the sustain electrodes.

Abstract: In a polycrystalline silicon thin film transistor, a semiconductor device having a high field effect mobility is achieved by increasing a grain size of a silicon thin film. First, an insulation layer having a two-layer structure is formed on a transparent insulated substrate 201. In the insulation layer, a lower insulation layer 202, which is in contact with the transparent insulating substrate 201, is made to have a higher thermal conductivity than an upper insulation layer 203. Thereafter, the upper insulation layer 203is patterned so that a plurality of stripes are formed thereon. Subsequently, an amorphous silicon thin film 204 is formed on the patterned insulation layer, and the insulation layer is irradiated with a laser light scanning in a direction parallel to the stripe pattern on the upper insulation layer 203. Thus, the amorphous silicon thin film 203 is formed into a polycrystalline silicon thin film 210.

Abstract: In a polycrystalline silicon thin film transistor, a semiconductor device having a high field effect mobility is achieved by increasing a grain size of a silicon thin film. First, an insulation layer having a two-layer structure is formed on a transparent insulated substrate 201. In the insulation layer, a lower insulation layer 202, which is in contact with the transparent insulating substrate 201, is made to have a higher thermal conductivity than an upper insulation layer 203. Thereafter, the upper insulation layer 203 is patterned so that a plurality of stripes are formed thereon. Subsequently, an amorphous silicon thin film 204 is formed on the patterned insulation layer, and the insulation layer is irradiated with a laser light scanning in a direction parallel to the stripe pattern on the upper insulation layer 203. Thus, the amorphous silicon thin film 203 is formed into a polycrystalline silicon thin film 210.

Abstract: In a polycrystalline silicon thin film transistor, a semiconductor device having a high field effect mobility is achieved by increasing a grain size of a silicon thin film. First, an insulation layer having a two-layer structure is formed on a transparent insulated substrate 201. In the insulation layer, a lower insulation layer 202, which is in contact with the transparent insulating substrate 201, is made to have a higher thermal conductivity than an upper insulation layer 203. Thereafter, the upper insulation layer 203. is patterned so that a plurality of stripes are formed thereon. Subsequently, an amorphous silicon thin film 204 is formed on the patterned insulation layer, and the insulation layer is irradiated with a laser light scanning in a direction parallel to the stripe pattern on the upper insulation layer 203. Thus, the amorphous silicon thin film 203 is formed into a polycrystalline silicon thin film 210.

Abstract: An object of the present invention is, by eliminating a driver IC from the components of an liquid crystal display, to achieve a cost reduction, to eliminate a manufacturing step of mounting the driver IC onto an array substrate, and to reduce a thickness of the liquid crystal display. A driver circuit for an active matrix liquid crystal display comprises a resistive dividing type digital-to-analog converter circuit (DAC). An analog output voltage from the DAC is amplified by a signal amplifier element, and a liquid crystal element is driven by the amplified analog output voltage. The driver circuit is characterized in that a resistance element R is formed in an n+ layer of p-Si on an array substrate of the liquid crystal display, and a switching element Tr and a signal amplifier element are also formed on the array substrate.

Abstract: An active matrix liquid crystal display for projection system comprises a light shielding layer 12 arranged between a layer 13 including thin film transistors and a first substrate 11 for shielding an injection light toward each of the thin transistors, said light shielding layer 12 having a plurality of openings through which each of the pixel electrodes 22 is exposed against the injection light. The light shielding layer 12 is preferably made of metal and is connected to an electric source. A level of voltage applied on the data lines is adverse to that applied on the light shielding layer with respect to polarity of the applied voltage.