Patents by Inventor Masuo Kato

Masuo Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7071028
    Abstract: A semiconductor device in which a semiconductor chip (3) is mounted on a substrate (2), comprising a substrate having electrodes (7, 8) for substrate-to-substrate connection disposed on both sides of the substrate and connected via a through hole (9), a semiconductor chip having an electrode connected to a wiring pattern arranged on the substrate and having a flat-cut face opposite to the face where the electrode is provided, a bump (4) for substrate-to-substrate connection provided on the electrode for substrate-to-substrate connection and having a flat-cut face opposite to the face facing the substrate, a sealing resin body (5) provided on the substrate, used for sealing the semiconductor chip and the bump for substrate-to-substrate, and having a flat-cut face opposite to the face facing the substrate, wherein the flat-cut face (3a) of the semiconductor chip, the flat-cut face (4a) of the bump for substrate-to-substrate, and the flat-cut face (5a) or the sealing resin body are flush with one another, and th
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: July 4, 2006
    Assignee: Sony Corporation
    Inventors: Toshihiko Koike, Manabu Honda, Masuo Kato
  • Publication number: 20040036164
    Abstract: A semiconductor device in which a semiconductor chip (3) is mounted on a substrate (2), comprising a substrate having electrodes (7, 8) for substrate-to-substrate connection disposed on both sides of the substrate and connected via a through hole (9), a semiconductor chip having an electrode connected to a wiring pattern arranged on the substrate and having a flat-cut face opposite to the face where the electrode is provided, a bump (4) for substrate-to-substrate connection provided on the electrode for substrate-to-substrate connection and having a flat-cut face opposite to the face facing the substrate, a sealing resin body (5) provided on the substrate, used for sealing the semiconductor chip and the bump for substrate-to-substrate, and having a flat-cut face opposite to the face facing the substrate, wherein the flat-cut face (3a) of the semiconductor chip, the flat-cut face (4a) of the bump for substrate-to-substrate, and the flat-cut face (5a) or the sealing resin body are flush with one another, and th
    Type: Application
    Filed: September 9, 2003
    Publication date: February 26, 2004
    Inventors: Toshihiko Koike, Manabu Honda, Masuo Kato
  • Patent number: 6612024
    Abstract: A semiconductor device with bump electrodes having acutely shaped tips and method of mounting same. The bump electrodes are brought into contact with respective portions of a conductive pattern of a mounting substrate without any foreign matter between the tips of the bump electrodes and the respective portions of the conductive pattern. Thereafter, sealing material is allowed to surround the bump electrodes.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: September 2, 2003
    Assignee: Sony Corporation
    Inventors: Dai Sasaki, Tohru Terasaki, Masuo Kato, Masami Tsurumi
  • Patent number: 6548330
    Abstract: To be capable of arbitrarily designing an interconnection shape of a surface layer to thereby promote reliability of connection in laminating layers and making destruction of a semiconductor element difficult to cause in a semiconductor apparatus having interconnections for connecting laminated layers on a surface and a back of a substrate and capable of laminating layers in multiple stages, a semiconductor apparatus is fabricated by a step of mounting a semiconductor element in a recess portion shallower than a thickness of a semiconductor element formed in a surface of a substrate having interconnection patterns connected by a through hole on two of the surface and a back in which a thickness of an interconnection on the surface is made thicker than a thickness of an interconnection on the back with a front thereof disposed on the lower side, a step of sealing the semiconductor element in the recess portion by synthetic resin and a step of grinding the substrate and the semiconductor element up to the inter
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: April 15, 2003
    Assignee: Sony Corporation
    Inventors: Toshihiro Murayama, Masuo Kato, Yasufumi Tatsuno
  • Publication number: 20020074163
    Abstract: An acute tip is formed on each top of bump electrodes of a semiconductor device to be mounted on a printed circuit board by facedown bonding. Each acute tip is then applied a leveling process as to form a small flat surface on its top. After that, each of the bump electrode is depressed gradually with heat for transforming the bump electrode against a conductor pattern of the printed circuit board for mounting . Resultantly, the semiconductor device is mounted on the printed circuit board firmly and without including foreign body between the bump electrode of the semiconductor device and the conductor pattern of the printed circuit board.
    Type: Application
    Filed: August 3, 2001
    Publication date: June 20, 2002
    Inventors: Dai Sasaki, Tohru Terasaki, Masuo Kato, Masami Tsurumi