Patents by Inventor Masuo Okuda

Masuo Okuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11283462
    Abstract: A semiconductor device includes first and second terminals, a reference resister being coupled between the first and second terminals, third and fourth terminals, a sensor resister being coupled between the third and fourth terminals, a first buffer which supplies a first reference voltage to the first terminal, a second buffer which supplies a second reference voltage to the fourth terminal, a reference voltage generation circuit which supplies one of first and second voltages alternately in a time division manner as the first reference voltage and supplies the other as the second reference voltage, a first analog-to-digital conversion circuit which performs analog-to-digital conversion on a signal line coupled to the third terminal, an RC filter disposed on the signal line, a noise detector which detects noise of the signal line, wherein a time constant of the RC filter is changed based on a result of the noise detector.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: March 22, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Ahmad H. Atriss, Masuo Okuda, Stuart N. Wooters
  • Patent number: 11156645
    Abstract: A semiconductor device includes an analog-digital conversion circuit that converts a voltage at a node between a reference resistor and a sensor resistor into output data, the reference resistor and the sensor resistor being connected in series. The semiconductor device calculates a resistance value of the sensor resistor using a first output data obtained in a first conversion phase and second output data obtained in a second conversion phase. In the first conversion phase, a high potential side voltage is applied to one end of the reference resistor and a low potential side voltage is applied to one end of the sensor resistor. In the second conversion phase, the low potential side voltage is applied to one end of the reference resistor and the high potential side voltage is applied to one end of the sensor resistor.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: October 26, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Masuo Okuda, Akemi Watanabe
  • Publication number: 20210313999
    Abstract: A semiconductor device includes first and second terminals, a reference resister being coupled between the first and second terminals, third and fourth terminals, a sensor resister being coupled between the third and fourth terminals, a first buffer which supplies a first reference voltage to the first terminal, a second buffer which supplies a second reference voltage to the fourth terminal, a reference voltage generation circuit which supplies one of first and second voltages alternately in a time division manner as the first reference voltage and supplies the other as the second reference voltage, a first analog-to-digital conversion circuit which performs analog-to-digital conversion on a signal line coupled to the third terminal, an RC filter disposed on the signal line, a noise detector which detects noise of the signal line, wherein a time constant of the RC filter is changed based on a result of the noise detector.
    Type: Application
    Filed: April 6, 2020
    Publication date: October 7, 2021
    Inventors: Ahmad H. ATRISS, Masuo OKUDA, Stuart N. WOOTERS
  • Publication number: 20200209289
    Abstract: A semiconductor device includes an analog-digital conversion circuit that converts a voltage at a node between a reference resistor and a sensor resistor into output data, the reference resistor and the sensor resistor being connected in series. The semiconductor device calculates a resistance value of the sensor resistor using a first output data obtained in a first conversion phase and second output data obtained in a second conversion phase. In the first conversion phase, a high potential side voltage is applied to one end of the reference resistor and a low potential side voltage is applied to one end of the sensor resistor. In the second conversion phase, the low potential side voltage is applied to one end of the reference resistor and the high potential side voltage is applied to one end of the sensor resistor.
    Type: Application
    Filed: December 18, 2019
    Publication date: July 2, 2020
    Inventors: Masuo OKUDA, Akemi WATANABE
  • Patent number: 4156912
    Abstract: An electronic navigation calculator having first input key group for navigation functions, second input key group for navigation numerals, third input key group for navigation operations, a memory device supplied with information signals from said first, second and third input key groups and memorizing said supplied information signals, operational and control device for carrying out predetermined navigation calculations in accordance with information signals from said input key groups, and output device for indicating the calculated results. As a result, a calculation of direction, speed, position and time of a moving body is carried out in accordance with said information signals from said first, second and third input key groups and the calculation result is displayed.
    Type: Grant
    Filed: November 14, 1974
    Date of Patent: May 29, 1979
    Assignee: Systek Corporation
    Inventors: Tomogoro Shigeta, Masuo Okuda, Tetsuo Ohnishi