Patents by Inventor Masuo Tanno

Masuo Tanno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5502953
    Abstract: A wafer transporting/storing method includes steps of accommodating one wafer in each flat casing, and transporting/storing the casing. A wafer carrier includes a flat casing, one side surface of which is opened as a wafer entrance/exit, a cover for closing the wafer entrance/exit, and a cover urging device, disposed between the casing and the cover, for urging the cover in a closed direction. The flat casing has a space for accommodating one wafer. In the carrier, at both sides of intermediate portions of the upper and lower surfaces of the space are inclined in the directions from each intermediate portion toward both ends of each of the upper and lower surfaces so that an interval between the upper and lower surfaces of the space becomes narrower toward both ends of the space.
    Type: Grant
    Filed: July 28, 1994
    Date of Patent: April 2, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ichiro Nakayama, Masuo Tanno, Kazuhiro Mori
  • Patent number: 5360106
    Abstract: A wafer transporting/storing method includes steps of accommodating one wafer in each flat casing, and transporting/storing the casing. A wafer carrier includes a flat casing, one side surface of which is opened as a wafer entrance/exit, a cover for closing the wafer entrance/exit, and a cover urging device, disposed between the casing and the cover, for urging the cover in a closed direction. The flat casing has a space for accommodating one wafer. In the carrier, at both sides of intermediate portions of the upper and lower surfaces of the space are end portions inclined in the directions from each intermediate portion toward both ends of each of the upper and lower surfaces so that an interval between the upper and lower surfaces of the space becomes narrower toward both ends of the space.
    Type: Grant
    Filed: March 2, 1993
    Date of Patent: November 1, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ichiro Nakayama, Masuo Tanno, Kazuhiro Mori
  • Patent number: 4937205
    Abstract: In a plasma doping process utilizing a radio frequency discharging in a vacuum by for doping an impurity into a semiconductor substrate, the radio frequency discharging is made intermittently and under controlling of average current of the discharging, thereby the impurity concentration is desirably controlled; and especially by selecting the vacuum in a range between 1.times.10.sup.-4 -5.times.10.sup.-2 torr, undesirable deposition of the impurity on the substrate surface is evadable.
    Type: Grant
    Filed: August 4, 1988
    Date of Patent: June 26, 1990
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ichiro Nakayama, Bunji Mizuno, Masabumi Kubota, Masuo Tanno
  • Patent number: 4912065
    Abstract: Disclosed is a plasma doping method capable of introducing a large quantity of impurities into a substrate at a relatively low temperature (200.degree. to 600.degree. C.). In the LSI fabrication process represented by Si process, it is necessary to introduce impurities at a properly controlled concentration into desired positions. In this plasma doping method, in order to satisfy this application, the doping temperature may be controlled around 100.degree. C. at high degree of vacuum and by ECR discharge or the like, and a process capable of using a resist mask generally used in the LSI fabrication step and controlling the concentration in a wide range is enabled, so that an extremely shallow impurity profile is realized.
    Type: Grant
    Filed: May 26, 1988
    Date of Patent: March 27, 1990
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Bunji Mizuno, Masafumi Kubota, Ichiro Nakayama, Masuo Tanno
  • Patent number: 4906347
    Abstract: The magnetron dry-etching apparatus has, behind its anode electrode (1) facing an object to be etched positioned on a cathode electrode (2), a rotatable magnet assembly comprising at least one pair of rotatable permanent magnets (12) of narrow-pie-shape, fixed on a common yoke (14) so that different polarity magnetic poles (N and S) are disposed side by side; whereby a uniform magnetic field is formed on a wafer (8) on the cathode (2) upon rotation of said magnet assembly, thereby assuring uniform etching even upon change of gas pressure of other etching conditions.
    Type: Grant
    Filed: August 4, 1988
    Date of Patent: March 6, 1990
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuyuki Tomita, Masuo Tanno, Yasuo Tanaka
  • Patent number: 4678539
    Abstract: A dry-etching method for etching materials of the silicon group comprises: providing the material to be etched in a reaction chamber; supplying a mixed gas as the etching gas comprising carbon fluoride, oxygen and another gas wherein the other gas is a partially halogenated hydrocarbon; and thereafter subjecting the etching gas to high frequency electric current so as to make the mixed gas into a plasma whereby the material is etched.
    Type: Grant
    Filed: November 19, 1985
    Date of Patent: July 7, 1987
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuyuki Tomita, Masuo Tanno
  • Patent number: 4612099
    Abstract: According to the present invention, there is used a usual reactive ion etching apparatus (as shown in FIG. 1) including a vacuum vessel (1), exhaust means (2), etching gas supply means (4), plasma generating electrodes (6) and high frequency power supply (7). Substance having a catalytic action (8) is inserted in the etching gas supply means (4), by which the present invention is characterized. According to the present invention, a catalyst having an action of dehydrogenation, dehydrohalogenation or dehalogenation dependent on the molecular structure of a halogenized gas to be used, is inserted in the etching gas supply means in the path thereof, thereby to improve the etching speed and the etching selectively without the use of explosive or injurious gases such as hydrogen, chlorine, hydrogen chloride or hydrogen fluoride as additive gases.
    Type: Grant
    Filed: July 11, 1984
    Date of Patent: September 16, 1986
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masuo Tanno, Yuichiro Yamada