Patents by Inventor Mate Jenei

Mate Jenei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240071944
    Abstract: The invention relates to the field of chip fabrication, in particular to the fabrication of superconducting integrated circuits for use in quantum computers. Raised and recessed alignment structures are provided on the surfaces of two substrate such that the raised and recessed alignment structure extends within the recessed alignment structure to a maximum depth determined by the geometry of the alignment structures. The alignment structures act as a hard stop for positioning and aligning the substrates for flip chip bonding.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Máté JENEI, Kok Wai Chan, Kuan Yen Tan
  • Patent number: 11907805
    Abstract: A three-dimensional superconducting qubit and a method for manufacturing the same are disclosed. In an example, a three-dimensional superconducting qubit comprises a structural base comprising one or more insulating materials, and superconductive patterns on surfaces of the structural base. The superconductive patterns form at least a capacitive part and an inductive part of the three-dimensional superconducting qubit. A first surface of the surfaces of the structural base defines a first plane and a second surface of the surfaces of the structural base defines a second plane, the second plane being oriented differently than the first plane. At least one superconductive pattern of the superconductive patterns extends from the first surface to the second surface.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: February 20, 2024
    Assignee: IQM Finland Oy
    Inventors: Caspar Ockeloen-Korppi, Tianyi Li, Wei Liu, Vasilii Sevriuk, Tiina Naaranoja, Mate Jenei, Jan Goetz, Kuan Yen Tan, Mikko Möttönen, Kok Wai Chan
  • Publication number: 20220359808
    Abstract: The invention relates to a method for forming flip chip bumps using electroplating. The method allows the formation of flip chip bumps in a way that is compatible with already-formed sensitive electronic components, such as Josephson junctions, which may be used in quantum processing units. The invention also relates to a product and a flip chip package in which flip chip bumps are formed with the disclosed method.
    Type: Application
    Filed: May 2, 2022
    Publication date: November 10, 2022
    Inventors: Máté Jenei, Kok Wai Chan, Hasnain Ahmad, Manjunath Ramachandrappa Venkatesh, Wei Liu, Lily Yang, Tianyi Li, Jean-Luc Orgiazzi, Caspar Ockeloen-Korppi, Alessandro Landra, Mario Palma
  • Publication number: 20220359415
    Abstract: Superconducting through substrate vias (STSVs) are disclosed. The STSVs provide superconducting interconnections between opposite faces of a substrate. In an example, a method of forming STSVs includes etching openings that extend from a first side of a substrate partially through the substrate towards a second side of the substrate. The method also includes depositing a seed layer over the first side of the substrate and interior surfaces of the openings in the substrate. The method further includes forming a resist or hardmask on the first side of the substrate above the seed layer, such that the resist or hardmask comprises openings aligned with the etched openings in the substrate. The etched openings in the substrate are filled with a superconducting filler material. The substrate is thinned by removing material from the second side of the substrate until the deposited seed layer is exposed on the second side of the substrate.
    Type: Application
    Filed: May 4, 2022
    Publication date: November 10, 2022
    Inventors: Máté Jenei, Kok Wai Chan, Hasnain Ahmad, Manjunath Ramachandrappa Venkatesh, Wei Liu, Lily Yang, Tianyi Li, Jean-Luc Orgiazzi, Caspar Ockeloen-Korppi, Alessandro Landra, Mario Palma
  • Publication number: 20220164690
    Abstract: A three-dimensional superconducting qubit and a method for manufacturing the same are disclosed. In an example, a three-dimensional superconducting qubit comprises a structural base comprising one or more insulating materials, and superconductive patterns on surfaces of the structural base. The superconductive patterns form at least a capacitive part and an inductive part of the three-dimensional superconducting qubit. A first surface of the surfaces of the structural base defines a first plane and a second surface of the surfaces of the structural base defines a second plane, the second plane being oriented differently than the first plane. At least one superconductive pattern of the superconductive patterns extends from the first surface to the second surface.
    Type: Application
    Filed: October 6, 2021
    Publication date: May 26, 2022
    Inventors: Caspar Ockeloen-Korppi, Tianyi Li, Wei Liu, Vasilii Sevriuk, Tiina Naaranoja, Mate Jenei, Jan Goetz, Kuan Yen Tan, Mikko Möttönen, Kok Wai Chan
  • Publication number: 20220012617
    Abstract: A quantum computing circuit is disclosed herein. An example quantum computing circuit includes a first chip with at least one qubit thereon. The quantum computing circuit also includes a second chip with at least other quantum circuit elements other than qubits thereon. The first chip and the second chip are stacked together in a flip-chip configuration and attached to each other with bump bonding that includes bonding bumps.
    Type: Application
    Filed: December 31, 2020
    Publication date: January 13, 2022
    Inventors: Juha Hassel, Wei Liu, Vasilii Sevriuk, Johannes Heinsoo, Mate Jenei, Manjunath Venkatesh, Tianyi Li, Kok Wai Chan, Kuan Yen Tan, Mikko Möttönen