Patents by Inventor Mateus Ribeiro Vanzella

Mateus Ribeiro Vanzella has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11867571
    Abstract: A low power temperature detection method, system, and apparatus sense when a temperature threshold is reached by connecting a current conveyor (111) with a startup bias circuit (112) having a first FET (P1) (connected to level shift a reference voltage to provide an input voltage VS1), a first diode-connected BJT (Q0) (connected to generate a base-emitter voltage based on the junction temperature), and a second FET (P2) (connected to level shift the base-emitter voltage), where the startup bias circuit (112) selectively connects the current conveyor (111) to ground to form a closed loop that is activated only when an emitter current at the first diode-connected BJT (Q0) enters a self-turned-on operation region, thereby activating the current conveyor to detect a temperature threshold being reached by the device junction temperature.
    Type: Grant
    Filed: October 1, 2021
    Date of Patent: January 9, 2024
    Assignee: NXP B.V.
    Inventors: Ricardo Pureza Coimbra, Mateus Ribeiro Vanzella
  • Patent number: 11774297
    Abstract: A temperature detection circuit includes a first current path and a second current path. The first current path includes a first transistor with a control terminal coupled to receive a reference voltage and includes a temperature sensing device. The second current path includes a second transistor with a control terminal coupled to a node of the first current path. The second current path includes a node that provides an indication of a detected temperature.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: October 3, 2023
    Assignee: NXP USA, INC.
    Inventors: Ricardo Pureza Coimbra, Mateus Ribeiro Vanzella, Matheus Silveira Remigio
  • Publication number: 20230108765
    Abstract: A low power temperature detection method, system, and apparatus sense when a temperature threshold is reached by connecting a current conveyor (111) with a startup bias circuit (112) having a first FET (P1) (connected to level shift a reference voltage to provide an input voltage VS1), a first diode-connected BJT (Q0) (connected to generate a base-emitter voltage based on the junction temperature), and a second FET (P2) (connected to level shift the base-emitter voltage), where the startup bias circuit (112) selectively connects the current conveyor (111) to ground to form a closed loop that is activated only when an emitter current at the first diode-connected BJT (Q0) enters a self-turned-on operation region, thereby activating the current conveyor to detect a temperature threshold being reached by the device junction temperature.
    Type: Application
    Filed: October 1, 2021
    Publication date: April 6, 2023
    Applicant: NXP B.V.
    Inventors: Ricardo Pureza Coimbra, Mateus Ribeiro Vanzella
  • Patent number: 11521693
    Abstract: A sample and hold circuit configured to sample a current includes an input node to receive the current, a capacitor coupled with a sampling node and a reference voltage node, switch between the input node and the sampling node, a controlled current source coupled to the input node, a current mirror circuit having connections each providing a mirrored current, wherein at least one of said connections provides an output node, and a transistor arrangement. The transistor arrangement includes a control MOSFET in series with a series connected chain of cascaded cells. The control MOSFET and each of said cascaded cells are coupled to the current mirror circuit and each of the cascaded cells includes a pair of MOSFETs arranged to provide a voltage difference including a difference between a gate-source voltage of a first of the pair and a gate-source voltage of a second of the pair.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: December 6, 2022
    Assignee: NXP B.V.
    Inventors: Ricardo Pureza Coimbra, Mateus Ribeiro Vanzella, Luis Enrique Del Castillo
  • Publication number: 20220254424
    Abstract: A sample and hold circuit configured to sample a current includes an input node to receive the current, a capacitor coupled with a sampling node and a reference voltage node, switch between the input node and the sampling node, a controlled current source coupled to the input node, a current mirror circuit having connections each providing a mirrored current, wherein at least one of said connections provides an output node, and a transistor arrangement. The transistor arrangement includes a control MOSFET in series with a series connected chain of cascaded cells. The control MOSFET and each of said cascaded cells are coupled to the current mirror circuit and each of the cascaded cells includes a pair of MOSFETs arranged to provide a voltage difference including a difference between a gate-source voltage of a first of the pair and a gate-source voltage of a second of the pair.
    Type: Application
    Filed: January 31, 2022
    Publication date: August 11, 2022
    Inventors: Ricardo Pureza Coimbra, Mateus Ribeiro Vanzella, Luis Enrique Del Castillo
  • Publication number: 20210396597
    Abstract: A temperature detection circuit includes a first current path and a second current path. The first current path includes a first transistor with a control terminal coupled to receive a reference voltage and includes a temperature sensing device. The second current path includes a second transistor with a control terminal coupled to a node of the first current path. The second current path includes a node that provides an indication of a detected temperature.
    Type: Application
    Filed: June 18, 2020
    Publication date: December 23, 2021
    Inventors: Ricardo Pureza Coimbra, Mateus Ribeiro Vanzella, Matheus Silveira Remigio