Patents by Inventor Mathew J. Parker

Mathew J. Parker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6754688
    Abstract: An apparatus and method for determining whether two operands are less than two are disclosed. A first module generates first detection bits from a first operand and a second operand, where the first detection bits indicate a difference of zero. A second module generates second detection bits from the first and second operands, where the second detection bits indicate a difference of one. A combiner combines the first and second detection bits to determine whether the difference of two numbers is less than two. The apparatus and method is used in determining to bypass normalization in floating point calculation.
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: June 22, 2004
    Assignee: Intel Corporation
    Inventors: Giao Pham, Mathew J. Parker
  • Publication number: 20020138539
    Abstract: An apparatus and method for determining whether two operands are less than two are disclosed. A first module generates first detection bits from a first operand and a second operand, where the first detection bits indicate a difference of zero. A second module generates second detection bits from the first and second operands, where the second detection bits indicate a difference of one. A combiner combines the first and second detection bits to determine whether the difference of two numbers is less than two. The apparatus and method is used in determining to bypass normalization in floating point calculation.
    Type: Application
    Filed: February 14, 2001
    Publication date: September 26, 2002
    Inventors: Giao Pham, Mathew J. Parker