Abstract: Techniques for efficient operation of a linear stage in an H-bridge system are provided. In an example, a linear stage can switch between voltage regulation and current regulation over a range of a command signal. The particular regulation mode can depend on the regulation mode of a switched stage of the H-bridge system. Efficiency can be realized by using current regulation of the linear stage when the output voltage of the linear stage moves away from the voltage of a supply rail. Such a control scheme can reduce the voltage across the linear stage for a larger range of the command signal resulting in less heat dissipation of the linear stage compared to conventional control of H-bridge linear stages.

Abstract: Techniques for efficient operation of a linear stage in an H-bridge system are provided. In an example, a linear stage can switch between voltage regulation and current regulation over a range of a command signal. The particular regulation mode can depend on the regulation mode of a switched stage of the H-bridge system. Efficiency can he realized by using current regulation of the linear stage when the output voltage of the linear stage moves away from the voltage of a supply rail. Such a control scheme can reduce the voltage across the linear stage for a larger range of the command signal resulting in less heat dissipation of the linear stage compared to conventional control of H-bridge linear stages.

Abstract: An error amplifier may be part of a voltage regulator and may include a single feedback input configured to receive a feedback signal. A single error output may be configured to provide an error output signal indicative of error in the feedback signal. A comparison circuit may be configured to provide an error signal to the single error output which is indicative of a difference between the feedback signal and whichever one of a set of reference signals is closest to the feedback signal. One or more of these reference signals may each be derived from an offset from a ground reference. One or more of the other reference signals may each be derived from an offset from a non-ground reference, such as a source of power for the error amplifier. The error amplifier may be on a single integrated circuit along with an associated driver circuit.

Abstract: An error amplifier may be part of a voltage regulator and may include a single feedback input configured to receive a feedback signal. A single error output may be configured to provide an error output signal indicative of error in the feedback signal. A comparison circuit may be configured to provide an error signal to the single error output which is indicative of a difference between the feedback signal and whichever one of a set of reference signals is closest to the feedback signal. One or more of these reference signals may each be derived from an offset from a ground reference. One or more of the other reference signals may each be derived from an offset from a non-ground reference, such as a source of power for the error amplifier. The error amplifier may be on a single integrated circuit along with an associated driver circuit.

Abstract: Some embodiments includes a digital control system having a microcontroller for handling timed events, a command decoder for interpreting user commands, a separate burst controller for handling burst reads of the Flash memory, a program buffer for handling page writes to the Flash memory, a page transfer controller for handling data transfers from the Flash core to the program buffer as well as address control for page writes from the program buffer to the Flash memory, a memory control register block for storing and adjusting memory control, and memory test mode signals, a memory plane interface for multiplexing addresses into the Flash memory and accelerating program, erase, and recovery verification, and an I/O Mux module for multiplexing data out of the system, and a general purpose I/O port (GPIO) that can be read and written by the microcontroller for use in test and debug. Other embodiments are described.

Abstract: A digital control system including a microcontroller for handling timed events, a command decoder for interpreting user commands, a separate burst controller for handling burst reads of the Flash memory, a program buffer for handling page writes to the Flash memory, a page transfer controller for handling data transfers from the Flash core to the program buffer as well as address control for page writes from the program buffer to the Flash memory, a memory control register block for storing and adjusting memory control and memory test mode signals, a memory plane interface for multiplexing addresses into the Flash memory and accelerating program, erase, and recovery verification, and an I/O Mux module for multiplexing data out of the system, and a general purpose I/O port (GPIO) that can be read and written by the microcontroller for use in test and debug.

Abstract: A digital control system including a microcontroller for handling timed events, a command decoder for interpreting user commands, a separate burst controller for handling burst reads of the Flash memory, a program buffer for handling page writes to the Flash memory, a page transfer controller for handling data transfers from the Flash core to the program buffer as well as address control for page writes from the program buffer to the Flash memory, a memory control register block for storing and adjusting memory control and memory test mode signals, a memory plane interface for multiplexing addresses into the Flash memory and accelerating program, erase, and recovery verification, and an I/O Mux module for multiplexing data out of the system, and a general purpose I/O port (GPIO) that can be read and written by the microcontroller for use in test and debug.

Abstract: In a voltage-level shifter, an input line is configured to convey an input voltage to be shifted. A pair of transistors is coupled to and is configured to receive the input voltage from the input line. There is a first side and a second side, with each side comprising the following: a low-voltage transistor that is coupled to the pair of transistors, a medium-voltage transistor that is coupled to the low-voltage transistor, a high-voltage transistor that is coupled to the medium-voltage transistor, and an output line, which is coupled to the first and second sides, for providing an output voltage that is higher than the input voltage.