Abstract: An electronic system with integrated circuit device and passive component is disclosed. One embodiment provides a printed circuit board, a method for fabricating an electronic system, and an electronic system, including at least one integrated circuit device and at least one passive component, wherein the passive component is arranged at least partially underneath the integrated circuit device.

Abstract: A semiconductor device comprises a material layer adapted to efficiently stop alpha particles that are substantially generated within a solder bump of a flip chip device. The materials used for stopping the alpha particles are compatible with standard back-end processing and do not degrade adhesion of the solder bump to the remaining substrate. Moreover, a low electrical resistance is maintained and heat dissipation may be improved.

Abstract: The present invention allows testing of bump connections under predefined conditions. To this end, a test structure including two substrates, each substrate having bond pads that are provided for flip-chip connecting both substrates. These bond pads may have electrical contact to other bond pads and/or special probe pads which are provided for making electrical connections to external devices. Electrically conductive bumps are formed on at least some of the bond pads of one of the substrates, and the bumps are electrically and mechanically connected to the bond pads in the other substrate.

Abstract: A solder bump structure and a method for forming the same are disclosed. Over a contact pad a first and a second metal film are deposited, wherein the second metal film is patterned prior to the deposition of a solder bump material such that an opening isolates an inner region of the second metal film from an outer region of the second metal film. The solder material deposited on the inner region and, at least partially, in the opening serves as an etch stop for a subsequent removal of the outer region.

Abstract: A solder bump structure and a method for forming the same are disclosed. Over a contact pad a first and a second metal film are deposited, wherein the second metal film is patterned prior to the deposition of a solder bump material such that an opening isolates an inner region of the second metal film from an outer region of the second metal film. The solder material deposited on the inner region and, at least partially, in the opening serves as an etch stop for a subsequent removal of the outer region.

Abstract: A test cell structure is provided that allows a precise measurement of electrical characteristics, such as the electrical resistance, between adjacent bond bumps in relation to a decreasing pitch between the bumps. The test cell structure comprises a substrate with an at least partially insulating surface, central and peripheral bond bumps formed on the partially insulating surface, and an insulating layer provided between the bond bumps. At last two respective distances of central bond bumps and associated peripheral bond bumps are different so that a variation of the electrical resistance with respect to variation of the distance of adjacent bond bumps can be determined. Particularly, when the distances are selected to be 80 &mgr;m and less, it is possible to relate the measurements obtained to corresponding design rules for semiconductor devices.

Abstract: A plurality of uniform bumps are formed on a semiconductor device by forming a mask onto the surface of the semiconductor device with openings in the mask that correspond to the electrical contact pads on the surface of the semiconductor device. Solder or other conductive material is deposited on the pads. A rate of solder or other conductive material deposition which may not give a uniform thickness of solder or other conductive material across the surface of the wafer may be used. Solder or other conductive material is deposited until each opening in the mask is filled with solder or other conductive material. Next, the mask and solder or other conductive material balls formed are scrubbed until the mask and the soldier balls reach a substantially uniform height. The openings formed in the mask have substantially the same footprint or area associated with each pad.

Abstract: A decoupling capacitor structure formed integral with an integrated circuit chip and over top of circuitry defined thereon advantageously provides decoupling capacitance in close electrical proximity to switching circuits of the integrated circuit chip without substantially affecting die footprint. In contrast with on-die gate oxide capacitor configurations, a decoupling capacitor structure formed toward the back end of processing, typically after interconnect metal, allows large area capacitor structures without substantial impact on area available for devices and circuitry. Inductance associated with the intervening portion of a power supply loop circuit between switching circuits of the integrated circuit chip and the decoupling capacitor structure can be extremely low in configurations in accordance with the present invention. In some configurations, connection points, e.g., bonding pads and/or solder bumps for conveying power supply voltages, are defined over top of the decoupling capacitor structure.

Abstract: A plurality of uniform bumps are formed on a semiconductor device by forming a plurality of bond limiting metallization areas. The surface of the semiconductor device is then plated with a plating metal that will be alloyed with the solder of the solder bump, said solder and the plating material forming an alloy during the reflowing step. A mask is then placed onto the surface of the semiconductor device. Openings are made in the mask that correspond to the plurality of bond limiting metallization areas on the surface of the semiconductor device. The plurality of bond limiting metallization areas are also the electrical contact pads. Solder is then deposited through the openings in the mask at a rate of solder deposition which provides a uniform thickness of solder across the surface of the wafer which is later diced into many chips. The openings formed in the mask have substantially a bigger footprint or area associated with each pad.