Patents by Inventor Mathias Rausch

Mathias Rausch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9088433
    Abstract: An advanced communication controller unit for a distributed communication system having a plurality of communication controller units, at least one being an advanced communication controller unit, each coupled to a communication medium and adapted to communicate using a communication is presented. The advanced communication controller unit comprises a protocol event recording circuit having a monitoring input connected to at least one protocol event data transmission path of the advanced communication controller unit and a debug output connected to a memory device; and adapted to filter protocol event data received from the monitoring input depending on at least one configuration parameter and to provide filtered protocol event data to the debug output. A method for recording protocol events using a protocol event recording circuit in an advanced communication controller unit and a vehicle comprising at least one advanced communication controller unit are also disclosed.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: July 21, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Clemens Roettgermann, Dirk Moeller, Mathias Rausch
  • Patent number: 8638821
    Abstract: A communication network includes a plurality of communication nodes, each node arranged for communicating frames of data with the other nodes during a dynamic segment having dynamic communication slots with respective communication slot numbers. Each of the plurality of communication nodes includes a time base having consecutive timeslots, associated with the dynamic communication slots; a communication slot number controller, for adjusting a communication slot number, a minislot counter for counting minislots while the adjusting of the communication slot counter is suspended and a control unit for controlling the communication slot number controller to either continue adjusting of the slot number if the determined duration of the reception is above a certain threshold or to continue adjusting of the slot number using the value obtained with the minislot counter if the determined duration of the reception is below a certain threshold.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: January 28, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Christopher Temple, Mathias Rausch
  • Publication number: 20120233500
    Abstract: An advanced communication controller unit for a distributed communication system having a plurality of communication controller units, at least one being an advanced communication controller unit, each coupled to a communication medium and adapted to communicate using a communication is presented. The advanced communication controller unit comprises a protocol event recording circuit having a monitoring input connected to at least one protocol event data transmission path of the advanced communication controller unit and a debug output connected to a memory device; and adapted to filter protocol event data received from the monitoring input depending on at least one configuration parameter and to provide filtered protocol event data to the debug output. A method for recording protocol events using a protocol event recording circuit in an advanced communication controller unit and a vehicle comprising at least one advanced communication controller unit are also disclosed.
    Type: Application
    Filed: November 10, 2009
    Publication date: September 13, 2012
    Applicant: Freescale Semiconductor, Inc
    Inventors: Clemens Roettgermann, Dirk Moeller, Mathias Rausch
  • Patent number: 8204035
    Abstract: A computer node comprising a synchronization unit for comparing network timing information for a first network with network timing information for a second network and for communicating to the first network the sign of the difference between the first network timing information and the second network timing information to allow the first network to alter its network timing information using the sign of the difference to allow the network timing difference between the first network and the second network to be reduced.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: June 19, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mathias Rausch, Christopher Temple
  • Patent number: 8130014
    Abstract: A data communication network may, include a first sub-network and a second sub-network. The first sub-network may include two or more two master clocks, and a synchronization system connected to the master clocks. The synchronization system may, for determine a time-base for the master clocks and control the master clocks based on the determined time-base. The first sub-network may include one or more slave synchronization data source for generating slave clock synchronization data derived from time information of the master clocks. The second sub-network may include one or more slave clocks and a slave clock time-base controller connected to the slave synchronization data source. The time-base controller may receive the slave clock synchronization data and control one or more of the one or more slave clocks in accordance with the slave clock synchronization data.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: March 6, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Florian Bogenberger, Mathias Rausch
  • Patent number: 8085700
    Abstract: A multi-node communications system is provided with communications protocol using both static (11, 12, 13, 18) (pre-determined) and dynamic (51, 52, 53 . . . ) (run-time determined) consecutive communication slots is used. The system has a number of distributed communication nodes, each node being arranged for communicating frames of data with the other nodes during both the static (11, 12, 13 . . . ) and the dynamic (51, 52, 53 . . . ) communication slots. Each node includes a synchronized time base 5 made up of consecutive timeslots (11, 12, 13 . . . , 51, 52, 53 . . . ). The timebase 5 has substantially the same error tolerance in each node. For static communication (10), a predetermined number of timeslots (20) are utilized for each static communication slot. For dynamic communication a dynamically allocated number of timeslots (60) are utilized for each dynamic communication slot. In this way both static and dynamic media arbitration is provided within a periodically recurring communication pattern.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: December 27, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Christopher Temple, Florian Bogenberger, Mathias Rausch, Manfred Thanner, Thomas Wuerz, Leonard Link, Gregor Pokorny
  • Patent number: 8060654
    Abstract: A data communication network may include two or more master clocks, and a synchronization system connected to the master clocks. The synchronization system may determine a time-base for the master clocks. The synchronization system may control the master clocks according to the determined time-base. The data communication network may include one or more slave clocks. The slave clocks may be controlled by a slave clock time-base controller based on time information of a single selected master clock selected from the master clocks.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: November 15, 2011
    Assignee: Freescale Semiconductor, Inc
    Inventors: Florian Bogenberger, Mathias Rausch
  • Publication number: 20110164626
    Abstract: A communication network for providing media arbitration via a communications protocol using consecutive communication slots in a communication network. The communication network comprises a plurality of communication nodes, each node arranged for communicating frames of data with the other nodes during a dynamic segment comprising dynamic communication slots with respective communication slot numbers.
    Type: Application
    Filed: September 18, 2008
    Publication date: July 7, 2011
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Christopher Temple, Mathias Rausch
  • Publication number: 20100073043
    Abstract: A data communication network may, include a first sub-network and a second sub-network. The first sub-network may include two or more two master clocks, and a synchronisation system connected to the master clocks. The synchronisation system may, for determine a time-base for the master clocks and control the master clocks based on the determined time-base. The first sub-network may include one or more slave synchronisation data source for generating slave clock synchronisation data derived from time information of the master clocks. The second sub-network may include one or more slave clocks and a slave clock time-base controller connected to the slave synchronisation data source. The time-base controller may receive the slave clock synchronisation data and control one or more of the one or more slave clocks in accordance with the slave clock synchronisation data.
    Type: Application
    Filed: October 31, 2006
    Publication date: March 25, 2010
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Florian Bogenberger, Mathias Rausch
  • Publication number: 20100001770
    Abstract: A data communication network may include two or more master clocks, and a synchronisation system connected to the master clocks. The synchronisation system may determine a time-base for the master clocks. The synchronisation system may control the master clocks according to the determined time-base. The data communication network may include one or more slave clocks. The slave clocks may be controlled by a slave clock time-base controller based on time information of a single selected master clock selected from the master clocks.
    Type: Application
    Filed: May 14, 2007
    Publication date: January 7, 2010
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Florian Bogenberger, Mathias Rausch
  • Patent number: 7586953
    Abstract: The invention refers to a method for monitoring a communication media access schedule of a communication controller (5) of a communication system (1) by means of a bus guardian (6). The communication system (1) comprises a communication media (2) and nodes (3) connected to the communication media (2). Each node (3) comprises a communication controller (5) and a bus guardian (6) assigned to the communication controller (5). Messages are transmitted among the nodes (3) across the communication media (2) based on a cyclic time triggered communication media access scheme.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: September 8, 2009
    Assignees: Robert Bosch GmbH, Bayerische Motoren Werke AG, DaimlerChrysler AG, Freescale Semiconductor, Inc., GM Global Technology Operations, Inc., NXP B.V.
    Inventors: Thomas Forest, Bernd Hedenetz, Mathias Rausch, Christopher Temple, Harald Eisele, Bernd Elend, Jörn Ungermann, Matthias Kühlewein, Ralf Belschner, Peter Lohrmann, Florian Bogenberger, Thomas Wuerz, Arnold Millsap, Patrick Heuts, Robert Hugel, Thomas Führer, Bernd Müller, Florian Hartwich, Manfred Zinke, Josef Berwanger, Christian Ebner, Harald Weiler, Peter Fuhrmann, Anton Schedl, Martin Peller
  • Patent number: 7542412
    Abstract: A self-routing communication network (100) having: a plurality of nodes (N1-N15); a plurality of star couplers (S1-S4) each having a plurality of inputs and a plurality of outputs; and communication paths coupled between the plurality of star couplers and the plurality of nodes for communication therebetween of frames of information, including at least one redundant communication path (L1-L3), and each of the star couplers sensing which of its inputs first receives a frame and passing only the frame first received. The frames each have a fram-start-sequence (FSS), and the star couplers change the fram-start-sequences before outputting the frame of information e.g. by reducing the size of a frame's fram-start-sequence by a predetermined amount (e.g., 2 bits), whereby interconnection failure may be diagnosed by analyzing the frame-start-sequence.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: June 2, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mathias Rausch, Christopher Temple
  • Patent number: 7430261
    Abstract: A method and a bit stream decoding unit for bit stream decoding has a bit stream comprising a number of consecutive samples. In order to provide for rapid and, in particular, reliable decoding of the bit stream, a detection window comprising a number of samples is defined and the detection window is positioned at certain positions on the bit stream in order to comprise certain samples with respective sample values. A majority voting is applied to the sample values in the detection window and, in dependence on the result of the majority voting, the bit stream is decoded and respective bit values are generated.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: September 30, 2008
    Assignees: Robert Bosch GmbH, DaimlerChrysler AG, Bayerische Motoren Werke AG, General Motors Corp., Motorola Inc., Koninklijke Philips Electronics N.V.
    Inventors: Thomas Forest, Bernd Hedenetz, Mathias Rausch, Christopher Temple, Harald Eisele, Bernd Elend, Jörn Ungermann, Matthias Kühlewein, Ralf Belschner, Peter Lohrmann, Florian Bogenberger, Thomas Wuerz, Arnold Millsap, Patrick Heuts, Robert Hugel, Thomas Führer, Bernd Müller, Florian Hartwich, Manfred Zinke, Josef Berwanger, Christian Ebner, Harald Weiler, Peter Fuhrmann, Anton Schedl, Martin Peller
  • Patent number: 7349512
    Abstract: The present invention provides an improved clock synchronization algorithm for a distributed system intended for real time applications by performing at the same time an off-set correction and a clock read correction at each node of the distributed system. Expensive oscillators can be avoided and synchronization can be established faster and with higher precision.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: March 25, 2008
    Assignees: Motorola, Inc., Robert Bosch GmbH, DaimlerChrysler AG, Bayerische Motoren Werke
    Inventors: Mathias Rausch, Bernd Müller, Bernd Hedenetz, Anton Schedl
  • Publication number: 20070116058
    Abstract: A computer node comprising a synchronisation unit for comparing network timing information for a first network with network timing information for a second network and for communicating to the first network the sign of the difference between the first network timing information and the second network timing information to allow the first network to alter its network timing information using the sign of the difference to allow the network timing difference between the first network and the second network to be reduced.
    Type: Application
    Filed: July 15, 2004
    Publication date: May 24, 2007
    Inventors: Mathias Rausch, Christopher Temple
  • Publication number: 20060045133
    Abstract: A multi-node communications system is provided with communications protocol using both static (11, 12, 13, 18) (pre-determined) and dynamic (51, 52, 53 . . . ) (run-time determined) consecutive communication slots is used. The system has a number of distributed communication nodes, each node being arranged for communicating frames of data with the other nodes during both the static (11, 12, 13 . . . ) and the dynamic (51, 52, 53 . . . ) communication slots. Each node includes a synchronized time base 5 made up of consecutive timeslots (11, 12, 13 . . . , 51, 52, 53 . . . ). The timebase 5 has substantially the same error tolerance in each node. For static communication (10), a predetermined number of timeslots (20) are utilized for each static communication slot. For dynamic communication a dynamically allocated number of timeslots (60) are utilized for each dynamic communication slot. In this way both static and dynamic media arbitration is provided within a periodically recurring communication pattern.
    Type: Application
    Filed: November 21, 2003
    Publication date: March 2, 2006
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Christopher Temple, Florian Bogenberger, Mathias Rausch, Manfred Thanner, Thomas Wuerz, Leonard Link
  • Publication number: 20050243715
    Abstract: A self-routing communication network (100) having: a plurality of nodes (N1-N15); a plurality of star couplers (S1-S4) each having a plurality of inputs and a plurality of outputs; and communication paths coupled between the plurality of star couplers and the plurality of nodes for communicaton therebetween of frames of information, including at least one redundant communication path (L1-L3), and each of the star couplers sensing which of its inputs first receives a frame and passing only the frame first received. The frames each have a fram-start-sequence (FSS), and the star couplers change the fram-start-sequences before outputting the frame of information e.g. by reducing the size of a frame's fram-start-sequence by a predetermined amount (e.g., 2 bits), whereby interconnection failure may be diagnosed by analysing the frame-start-sequence.
    Type: Application
    Filed: November 1, 2002
    Publication date: November 3, 2005
    Inventors: Mathias Rausch, Christopher Temple
  • Publication number: 20050164699
    Abstract: A communication network (300, 400), and (D1-D3, D11-D13, 500) for use therein, comprising a plurality of nodes (N1-N4, N11-N13), a communication medium for communicating between the plurality of nodes; and communication diode arrangement(s) (D1-D3, D11-D13, 500) for controlledly enabling/disabling access of the node(s) to the communication medium by control external to the node(s). The communication diode arrangement(s) can enforce fail-silence in the time domain within a distributed computer system, showing resilience against spatial proximity faults. The communication diode arrangement(s) may be controllable not only by time but also by commands embedded in frames. This allows isolation of a faulty processing node and/or subnets within an embedded distributed real-time communication system, such as for automotive by-wire applications (FlexRay, TTP), under consideration of spatial proximity faults.
    Type: Application
    Filed: November 1, 2002
    Publication date: July 28, 2005
    Inventors: Christopher Temple, Mathias Rausch
  • Publication number: 20050141565
    Abstract: The invention refers to one of a number of nodes of a communication system. The nodes are connected to a communication media for transmitting data among the nodes. Said one node comprises a communication controller, across which the node is connected to the communication media, and a bus guardian for controlling access of the communication controller to the communication media. In order to provide a cheap but nevertheless reliable way for monitoring the synchronized clock signal of a node of a communication system and in particular for detecting deviations of the synchronized clock signal it is suggested that a synchronized clock signal from the communication controller is made available to the bus guardian, and that the bus guardian comprises means for monitoring the synchronized clock signal using a bus guardian internal clock signal, which is generated by means of an electronic circuit and which is less accurate than the synchronized clock signal to be monitored.
    Type: Application
    Filed: July 7, 2003
    Publication date: June 30, 2005
    Applicants: Robert Bosch GmbH, Daimler Chrysler AG, Bayerische Motoren Werke AG, General Motors Corp., Motorola Inc., Koninklijke Philips Electronics N.V.
    Inventors: Thomas Forest, Bernd Hedenetz, Mathias Rausch, Christopher Temple, Harald Eisele, Bernd Elend, Jorn Ungermann, Matthias Kuhlewein, Ralf Belschner, Peter Lohrmann, Florian Bogenberger, Thomas Wuerz, Arnold Millsap, Patrick Heuts, Robert Hugel, Thomas Fuhrer, Bernd Muller, Florian Hartwich, Manfred Zinke, Josef Berwanger, Christian Ebner, Harald Weiler, Peter Fuhrmann, Anton Schedl, Martin Peller
  • Publication number: 20050013394
    Abstract: The present invention provides an improved clock synchronization algorithm for a distributed system intended for real time applications by performing at the same time an off-set correction and a clock read correction at each node of the distributed system. Expensive oscillators can be avoided and synchronization can be established faster and with higher precision.
    Type: Application
    Filed: July 24, 2002
    Publication date: January 20, 2005
    Inventors: Mathias Rausch, Bernd Muller, Bernd Hedenetz, Anton Schedl