Abstract: Disclosed are methods and systems for depositing a material comprising a germanium chalcogenide. The material may be selectively deposited onto a surface of a substrate. The deposition process may be a cyclical deposition process. Exemplary devices in which the layers may be incorporated include memory devices.

Abstract: The present invention provides a method for fabricating a dielectric stack in an integrated circuit comprising the steps of (i) forming a high-k dielectric layer on a semiconductor substrate, (ii) subjecting the semiconductor substrate with the high-k dielectric layer to a nitrogen comprising vapor phase reactant and silicon comprising vapor phase reactant in a plasma-enhanced chemical vapor deposition process (PECVD) or a plasma-enhanced atomic layer chemical vapor deposition (PE ALCVD) process. Furthermore, the present invention provides a dielectric stack in an integrated circuit comprising (i) a high-k dielectric layer comprising at least a high-k material, (ii) a dielectric layer comprising at least silicon and nitrogen; (iii) an intermediate layer disposed between the high-k dielectric layer and the dielectric layer, the intermediate layer comprising the high-k material, silicon, and nitrogen.

Abstract: The present invention provides a method for fabricating a dielectric stack in an integrated circuit comprising the steps of (i) forming a high-k dielectric layer on a semiconductor substrate, (ii) subjecting the semiconductor substrate with the high-k dielectric layer to a nitrogen comprising vapor phase reactant and silicon comprising vapor phase reactant in a plasma-enhanced chemical vapor deposition process (PECVD) or a plasma-enhanced atomic layer chemical vapor deposition (PE ALCVD) process. Furthermore, the present invention provides a dielectric stack in an integrated circuit comprising (i) a high-k dielectric layer comprising at least a high-k material, (ii) a dielectric layer comprising at least silicon and nitrogen; (iii) an intermediate layer disposed between the high-k dielectric layer and the dielectric layer, the intermediate layer comprising the high-k material, silicon, and nitrogen.

Abstract: The invention relates to a method of manufacturing a semiconductor device (10) with a semiconductor body (1) comprising silicon is provided with an n-type doped semiconductor region (2) comprising silicon by means of an epitaxial deposition process, wherein the epitaxial deposition process of the n-type region is performed by positioning the semiconductor body (1) in an epitaxial reactor and introducing in the reactor a first gas stream comprising a carrier gas and further gas streams comprising a gaseous compound comprising silicon and a gaseous compound comprising an element from the fifth column of the periodic system of elements, while heating the semiconductor body (1) to a growth temperature (Tg) and using an inert gas as the carrier gas. According to the invention for the gaseous compound comprising silicon a mixture is chosen of a first gaseous silicon compound which is free of chlorine and a second gaseous silicon compound comprising chlorine.

Abstract: The present invention provides a method of depositing epitaxial layers based on Group IV elements on a silicon substrate by Chemical Vapor Deposition, wherein nitrogen or one of the noble gases is used as a carrier gas, and the invention further provides a Chemical Vapor Deposition apparatus (10) comprising a chamber (12) having a gas input port (14) and a gas output port (16), and means (18) for mounting a silicon substrate within the chamber (12), said apparatus further including a gas source connected to the input port and arranged to provide nitrogen or a noble gas as a carrier gas.

Abstract: The present invention provides a method for fabricating a dielectric stack in an integrated circuit comprising the steps of (i) forming a high-k dielectric layer on a semiconductor substrate, (ii) subjecting the semiconductor substrate with the high-k dielectric layer to a nitrogen comprising vapor phase reactant and silicon comprising vapor phase reactant in a plasma-enhanced chemical vapor deposition process (PECVD) or a plasma-enhanced atomic layer chemical vapor deposition (PE ALCVD) process. Furthermore, the present invention provides a dielectric stack in an integrated circuit comprising (i) a high-k dielectric layer comprising at least a high-k material, (ii) a dielectric layer comprising at least silicon and nitrogen; (iii) an intermediate layer disposed between the high-k dielectric layer and the dielectric layer, the intermediate layer comprising the high-k material, silicon, and nitrogen.

Abstract: A semiconductor device is provided comprising a semiconductor substrate having on its top a Thin Strain Relaxed Buffer. The Thin Strain Relaxed Buffer consists of a stack of three layers of essentially constant Ge concentration. The three layers include a first epitaxial layer of Si1-xGex, a second epitaxial layer of Si1-xGex:C, and a third epitaxial layer of Si1-xGex on the second epitaxial layer. A method to fabricate such a buffer is also provided.

Abstract: A semiconductor device is provided comprising a semiconductor substrate having on its top a Thin Strain Relaxed Buffer. The Thin Strain Relaxed Buffer consists of a stack of three layers of essentially constant Ge concentration. The three layers include a first epitaxial layer of Si1-xGex, a second epitaxial layer of Si1-xGex: C, and a third epitaxial layer of Si1-xGex, on the second epitaxial layer. A method to fabricate such a buffer is also provided.