Patents by Inventor Mathieu Jaloux

Mathieu Jaloux has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9312765
    Abstract: In one embodiment, a circuit comprises a sense circuit configured to sense an increase in an output voltage of a switching regulator under a light load condition. A pulse generating circuit generates a control signal to switch on and off a voltage input to the switching regulator. The pulse generating circuit reduces in a binary manner a switching frequency of the control signal under the light load condition as the sensed output voltage increases. As the output voltage rises, a clock signal is divided by two to remove every second pulse and applied to the pulse generating circuit. Further increases in the output voltage cause divisions of the clock frequency by four to remove 3 of 4 pulses so that only every fourth pulse remains. With output voltage increases, the frequency is divided by eight to remove 7 of 8 pulses so that every eighth pulse remains, and so forth.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: April 12, 2016
    Assignee: QUALCOMM, Incorporated
    Inventors: Gregory Walsh, Zoran Janosevic, Mathieu Jaloux, Hardik M Patel
  • Publication number: 20150229211
    Abstract: In one embodiment, a circuit comprises a sense circuit configured to sense an increase in an output voltage of a switching regulator under a light load condition. A pulse generating circuit generates a control signal to switch on and off a voltage input to the switching regulator. The pulse generating circuit reduces in a binary manner a switching frequency of the control signal under the light load condition as the sensed output voltage increases. As the output voltage rises, a clock signal is divided by two to remove every second pulse and applied to the pulse generating circuit. Further increases in the output voltage cause divisions of the clock frequency by four to remove 3 of 4 pulses so that only every fourth pulse remains. With output voltage increases, the frequency is divided by eight to remove 7 of 8 pulses so that every eighth pulse remains, and so forth.
    Type: Application
    Filed: February 12, 2014
    Publication date: August 13, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Gregory Walsh, Zoran Janosevic, Mathieu Jaloux, Hardik M. Patel