Abstract: A monolithic component includes a field-effect power transistor and at least one first Schottky diode inside and on top of a gallium nitride substrate.

Abstract: A power supply interface includes a first switch that couples an input terminal to an output terminal. A voltage dividing bridge is coupled to receive a supply potential. A comparator has a first input connected to a first node of the bridge and a second input configured to receive a constant potential. A digital-to-analog converter generates a control voltage that is selectively coupled by a second switch to a second node of the bridge. A circuit control controls actuation of the second switch based on operating mode and generates a digital value input to the converter based on a negotiated set point of the supply potential applied to the input terminal.

Abstract: A circuit for protecting against electrostatic discharges includes two avalanche circuit components having different turn-on delays with respect to a beginning of an electrostatic discharge. The two avalanche circuit components are coupled in parallel. The avalanche circuit component closer to an output node has a turn-on delay on the order of 30 ns, while the avalanche circuit component closer to an input node has a turn-on delay on the order of 1 ns.

Abstract: Laterally insulated integrated circuit chips are fabricated from a semiconductor wafer. Peripheral trenches are formed in the wafer which laterally delimit integrated circuit chips to be formed. A depth of the peripheral trenches is greater than or equal to a desired final thickness of the integrated circuit chips. The peripheral trenches are formed by a process which repeats successive steps of a) ion etching using a sulfur hexafluoride plasma, and b) passivating using an octafluorocyclobutane plasma. Upon completion of the step of forming the peripheral trenches, lateral walls of the peripheral trenches are covered by an insulating layer of a polyfluoroethene. A thinning step is performed on the lower surface of the wafer until a bottom of the peripheral trenches is reached. The insulating layer is not removed.

Abstract: A device may be for protection against overvoltages in a power supply line. The device may include a breakover diode, an avalanche diode coupled in series with the breakover diode, and a switch coupled in parallel with the breakover diode and the avalanche diode. The device may also include a circuit coupled across the avalanche diode and configured to control the switch.

Abstract: An electrostatic discharge protection device includes first and second diodes series-connected between first and second connection terminals. A third connection terminal is coupled to a junction of the first and second diodes. A capacitor is connected in parallel with the first and second diodes between the first and second terminals.

Abstract: An electrostatic discharge protection device includes first and second diodes series-connected between first and second connection terminals. A third connection terminal is coupled to a junction of the first and second diodes. A capacitor is connected in parallel with the first and second diodes between the first and second terminals.

Abstract: An integrated circuit includes a vertical Shockley diode and a first vertical transistor. The diode is formed by, from top to bottom of a semiconductor substrate, a first region of a first conductivity type, a substrate of a second conductivity type, and a second region of the first conductivity type having a third region of the second conductivity type formed therein. The vertical transistor is formed by, also from top to bottom, a portion of the second region and a fourth region of the second conductivity type. The third and fourth regions are electrically connected to each other.

Abstract: An integrated circuit includes a vertical Shockley diode and a first vertical transistor. The diode is formed by, from top to bottom of a semiconductor substrate, a first region of a first conductivity type, a substrate of a second conductivity type, and a second region of the first conductivity type having a third region of the second conductivity type formed therein. The vertical transistor is formed by, also from top to bottom, a portion of the second region and a fourth region of the second conductivity type. The third and fourth regions are electrically connected to each other.