Abstract: An electronic device includes a first array of image pixels having inputs coupled to first selection tracks and outputs coupled to first output tracks, a second array of test pixels having inputs coupled to second selection tracks and outputs coupled to the first output tracks, and a third array of test pixels having inputs coupled to the first selection tracks and outputs coupled to second output tracks. A processor is coupled to receive output signals on the first and second output tracks. The output signals from the test pixels of the second and third arrays are fixed at one or the other of only two values in the absence of a defect. The output signals received by the processor over the first and second output tracks are processed to determine presence or absence of a defect.

Abstract: An electronic device includes a first array of image pixels having inputs coupled to first selection tracks and outputs coupled to first output tracks, a second array of test pixels having inputs coupled to second selection tracks and outputs coupled to the first output tracks, and a third array of test pixels having inputs coupled to the first selection tracks and outputs coupled to second output tracks. A processor is coupled to receive output signals on the first and second output tracks. The output signals from the test pixels of the second and third arrays are fixed at one or the other of only two values in the absence of a defect. The output signals received by the processor over the first and second output tracks are processed to determine presence or absence of a defect.

Abstract: An electronic device includes a voltage divider producing different reference voltages. Dummy pixels each are formed by a transfer gate transistor having a first conduction terminal coupled to a floating diffusion node, a second conduction terminal, and a control node coupled to a first gate signal line, a transmission gate coupled between one of the plurality of taps and the second conduction terminal of the transfer gate transistor, a floating diffusion capacitor coupled between the floating diffusion node and ground, a transistor having a first conduction terminal coupled to the floating diffusion node, a second conduction terminal, and a control terminal coupled to a second gate signal line, and a reset transistor having a first conduction terminal coupled to the upper reference voltage, a second conduction terminal coupled to the second conduction terminal of the transistor, and a control terminal coupled to a reset signal line.

Abstract: An electronic device includes a voltage divider producing different reference voltages. Dummy pixels each are formed by a transfer gate transistor having a first conduction terminal coupled to a floating diffusion node, a second conduction terminal, and a control node coupled to a first gate signal line, a transmission gate coupled between one of the plurality of taps and the second conduction terminal of the transfer gate transistor, a floating diffusion capacitor coupled between the floating diffusion node and ground, a transistor having a first conduction terminal coupled to the floating diffusion node, a second conduction terminal, and a control terminal coupled to a second gate signal line, and a reset transistor having a first conduction terminal coupled to the upper reference voltage, a second conduction terminal coupled to the second conduction terminal of the transistor, and a control terminal coupled to a reset signal line.

Abstract: An electronic device includes an array of image pixels, with the array of image pixels having inputs coupled to control lines and outputs coupled to output lines, and at least one array of dummy pixels, with the at least one array of dummy pixels having inputs coupled to the control lines. Each dummy pixel of the at least one array of dummy pixels is configured to provide a certain output signal in an absence of a fault with at least one of the control lines or of a fault with at least one of the output lines, such that a lack of output of the certain output signal by one or more of the dummy pixels of the at least one array of dummy pixels indicates the fault.

Abstract: An electronic device includes an array of image pixels, with the array of image pixels having inputs coupled to control lines and outputs coupled to output lines, and at least one array of dummy pixels, with the at least one array of dummy pixels having inputs coupled to the control lines. Each dummy pixel of the at least one array of dummy pixels is configured to provide a certain output signal in an absence of a fault with at least one of the control lines or of a fault with at least one of the output lines, such that a lack of output of the certain output signal by one or more of the dummy pixels of the at least one array of dummy pixels indicates the fault.

Abstract: Tone mapping is applied to pixels of a digital image. A luminance value of a pixel is determined based on whether one or more pixel intensity values of a pixel in a color space are within a pixel saturation range. A pixel gain is determined based on the determined luminance value of the pixel, and the determined pixel gain is applied to the pixel. The luminance value may also or instead be determined based on whether one or more of the pixel intensity values is within a pixel black-out range. A weight may be employed to determine the luminance value.

Abstract: Tone mapping is performed by digital image processing circuitry on a macro-pixel basis. A luminance value of a macro-pixel of a digital image in a color space is determined. The macro-pixel includes a plurality of individual pixels. Respective tone-mapping gain values of each pixel of the macro-pixel are determined based on the determined luminance value of the macro-pixel. The determined tone-mapping gains are applied to the respective pixels of the macro-pixel. The color space may be a CFA color space, such as a Bayer color space.

Abstract: Digital image processing circuitry converts images in a color filter array (CFA) color space to images in a luminance-chrominance (YUV) 4:2:0 color space, and the images in the YUV 4:2:0 color space are processed by the digital image processing circuitry in the YUV 4:2:0 color space, for example, to apply noise filtering, etc. The converting includes simultaneously receiving pixel data defining a macro-pixel in the CFA color space. The processing in the YUV color space is applied on a macro-pixel level to the macro-pixel of the image in the YUV color space.

Abstract: Tone mapping is applied to pixels of a digital image. A luminance value of a pixel is determined based on whether one or more pixel intensity values of a pixel in a color space are within a pixel saturation range. A pixel gain is determined based on the determined luminance value of the pixel, and the determined pixel gain is applied to the pixel. The luminance value may also or instead be determined based on whether one or more of the pixel intensity values is within a pixel black-out range. A weight may be employed to determine the luminance value.

Abstract: Digital image processing circuitry converts a macro-pixel of an image in a color filter array (CFA) color space to a macro-pixel in a luminance-chrominance (YUV) color space. Chrominance filtering is applied to chrominance components of the converted macro-pixel in the YUV color space, generating a filtered macro-pixel in the YUV color space. The filtered macro-pixel in the YUV color space is converted into a filtered macro-pixel in the CFA color space.

Abstract: A digital image processing circuit processes macro-pixels of a digital image. A gain control parameter of each pixel of the macro-pixel of the digital image is determined based on a location of the pixel in the digital image. Relative pixel positions of the pixels of the macro-pixel are determined, the relative pixel positions representing pixel positions with respect to color grids. A gain value of each pixel of the macro-pixel is determined based on the relative pixel positions. The gain values are modified based on the gain control parameters. The modified gains are applied to the pixels of the macro-pixel.

Abstract: Digital image processing circuitry converts images in a color filter array (CFA) color space to images in a luminance-chrominance (YUV) 4:2:0 color space, and the images in the YUV 4:2:0 color space are processed by the digital image processing circuitry in the YUV 4:2:0 color space, for example, to apply noise filtering, etc. The converting includes simultaneously receiving pixel data defining a macro-pixel in the CFA color space. The processing in the YUV color space is applied on a macro-pixel level to the macro-pixel of the image in the YUV color space.

Abstract: Tone mapping is performed by digital image processing circuitry on a macro-pixel basis. A luminance value of a macro-pixel of a digital image in a color space is determined. The macro-pixel includes a plurality of individual pixels. Respective tone-mapping gain values of each pixel of the macro-pixel are determined based on the determined luminance value of the macro-pixel. The determined tone-mapping gains are applied to the respective pixels of the macro-pixel. The color space may be a CFA color space, such as a Bayer color space.

Abstract: A digital image processing circuit processes macro-pixels of a digital image. A gain control parameter of each pixel of the macro-pixel of the digital image is determined based on a location of the pixel in the digital image. Relative pixel positions of the pixels of the macro-pixel are determined, the relative pixel positions representing pixel positions with respect to color grids. A gain value of each pixel of the macro-pixel is determined based on the relative pixel positions. The gain values are modified based on the gain control parameters. The modified gains are applied to the pixels of the macro-pixel.

Abstract: Digital image processing circuitry converts a macro-pixel of an image in a color filter array (CFA) color space to a macro-pixel in a luminance-chrominance (YUV) color space. Chrominance filtering is applied to chrominance components of the converted macro-pixel in the YUV color space, generating a filtered macro-pixel in the YUV color space. The filtered macro-pixel in the YUV color space is converted into a filtered macro-pixel in the CFA color space.