Patents by Inventor Mathieu TOUBEIX

Mathieu TOUBEIX has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12355447
    Abstract: The present description concerns an electronic circuit (10) for providing a digital signal (Sn) comprising a succession of ramps, the electronic circuit being clocked by a clock signal, the electronic circuit being configured to supply a number Nout of digital values of the digital signal at each cycle of the clock signal, Nout being greater than 1. The electronic circuit comprises a first memory (30) in which are stored, for each ramp, first data, and a second memory (32) in which are stored second data relative to the numbers of cycles of the clock signal over which some of the ramps extend, and a first circuit (40) configured to read from the first memory the first data relative to a plurality of successive ramps and from the second memory the second data associated with said plurality of successive ramps, and to supply said digital values.
    Type: Grant
    Filed: January 31, 2024
    Date of Patent: July 8, 2025
    Assignee: Commissariat à l'Energie Atomique et aux Energies Alternatives
    Inventors: Mathieu Toubeix, Eric Guthmuller, Adrian Evans
  • Publication number: 20240259003
    Abstract: The present description concerns an electronic circuit (10) for providing a digital signal (Sn) comprising a succession of ramps, the electronic circuit being clocked by a clock signal, the electronic circuit being configured to supply a number Nout of digital values of the digital signal at each cycle of the clock signal, Nout being greater than 1. The electronic circuit comprises a first memory (30) in which are stored, for each ramp, first data, and a second memory (32) in which are stored second data relative to the numbers of cycles of the clock signal over which some of the ramps extend, and a first circuit (40) configured to read from the first memory the first data relative to a plurality of successive ramps and from the second memory the second data associated with said plurality of successive ramps, and to supply said digital values.
    Type: Application
    Filed: January 31, 2024
    Publication date: August 1, 2024
    Inventors: Mathieu TOUBEIX, Eric GUTHMULLER, Adrian EVANS