Abstract: In an embodiment, a voltage converter includes: a first transistor coupled between a first rail configured to receive a supply voltage and a first node; and an inductance coupled between the first node and a second node configured to deliver an output voltage, wherein, at each operating cycle of the converter, the first transistor is maintained in the on state for a first time period proportional to the inverse of a voltage difference between the supply voltage and the output voltage.

Abstract: In an embodiment, a voltage converter includes: a first transistor coupled between an internal node and a first node receiving a supply voltage; a second transistor coupled between the internal node and a second node receiving a reference voltage; an inductance coupled between the internal node and an output node; a first circuit controlling the first and second transistors; and a second circuit configured to detect, when the first and second transistors are in the off state, when the voltage of the internal node is equal to the voltage of the output node, to condition a switching to the on state of the first transistor.

Abstract: In an embodiment, a voltage converter includes: a first transistor coupled between an internal node and a first node receiving a supply voltage; a second transistor coupled between the internal node and a second node receiving a reference voltage; an inductance coupled between the internal node and an output node; a first circuit controlling the first and second transistors; and a second circuit configured to detect, when the first and second transistors are in the off state, when the voltage of the internal node is equal to the voltage of the output node, to condition a switching to the on state of the first transistor.

Abstract: In an embodiment, a voltage converter includes: a first transistor coupled between a first rail configured to receive a supply voltage and a first node; and an inductance coupled between the first node and a second node configured to deliver an output voltage, wherein, at each operating cycle of the converter, the first transistor is maintained in the on state for a first time period proportional to the inverse of a voltage difference between the supply voltage and the output voltage.

Abstract: A frequency conversion device for transforming a frequency of an input signal, the device comprising: a signal generator for providing a plurality N of first signals at a first frequency, where N?1, from an input signal having an in-phase component I and a quadrature signal component Q; an oscillator for generating N parallel oscillation signals, wherein the N oscillation signals are stepped in phase with respect to one another; a mixer comprising N mixing components, each mixing component being coupled to receive a respective one of the plurality of first signals and coupled to receive a respective oscillation signal for mixing the respective first signal with the corresponding oscillation signal to provide an output signal; and a common amplifier for receiving the N output signals from the N mixing components in N sequential phases for transmission.

Abstract: A frequency conversion device for transforming a frequency of an input signal, the device comprising: a signal generator for providing a plurality N of first signals at a first frequency, where N?1, from an input signal having an in-phase component I and a quadrature signal component Q; an oscillator for generating N parallel oscillation signals, wherein the N oscillation signals are stepped in phase with respect to one another; a mixer comprising N mixing components, each mixing component being coupled to receive a respective one of the plurality of first signals and coupled to receive a respective oscillation signal for mixing the respective first signal with the corresponding oscillation signal to provide an output signal; and a common amplifier for receiving the N output signals from the N mixing components in N sequential phases for transmission.

Abstract: A D-type static latch circuit is provided that includes first and second circuits connected between a first reference potential and a second reference potential, with the first circuit comprising a first transistor, a second transistor and a third transistor connected in series, and the second circuit comprising a fourth transistor, a fifth transistor and a sixth transistor connected in series.