Abstract: A secure SoC IC is disclosed herein. In embodiments, a SoC IC for computing may comprise a plurality of processor cores, wherein each processor core has at least one level of private cache and its own private memory to securely execute one or more applications. Further, the SoC IC may include a plurality of isochronous memory disposed between selected pairs of the processor cores to provide deterministic data transfers between the processor core pairs. Other embodiments may be disclosed or claimed.

Abstract: A method including mapping a first portion of a virtual memory containing code of an operating system for access by a processor; receiving a call for an entry point of the operating system; and mapping, after receiving the call, a second portion of the virtual memory containing data for executing entry point code associated with the entry point for access by the processor. The processor executing the operating system code is permitted to access only data from the first and second portions of the virtual memory.

Abstract: A method and system encrypts data in a least privileged operating system. The method includes determining a first encryption scheme to be used with software code to be mapped to a virtual memory. The method includes mapping a first portion of the virtual memory with the software code for access by a processor using the first encryption scheme. The method includes receiving a call for an entry point of the operating system. The method includes determining a second encryption scheme to be used with the entry point when mapped to the virtual memory. The method includes mapping a second portion of the virtual memory for executing entry point code associated with the entry point for access by the processor using the second encryption scheme. The processor executing the software code is permitted to access only data from the first and second portions of the virtual memory.

Abstract: A secure SoC IC is disclosed herein. In embodiments, a SoC IC for computing may comprise a plurality of processor cores, wherein each processor core has at least one level of private cache and its own private memory to securely execute one or more applications. Further, the SoC IC may include a plurality of isochronous memory disposed between selected pairs of the processor cores to provide deterministic data transfers between the processor core pairs. Other embodiments may be disclosed or claimed.

Abstract: A method including mapping a first portion of a virtual memory containing code of an operating system for access by a processor; receiving a call for an entry point of the operating system; and mapping, after receiving the call, a second portion of the virtual memory containing data for executing entry point code associated with the entry point for access by the processor. The processor executing the operating system code is permitted to access only data from the first and second portions of the virtual memory.

Abstract: A method and system encrypts data in a least privileged operating system. The method includes determining a first encryption scheme to be used with software code to be mapped to a virtual memory. The method includes mapping a first portion of the virtual memory with the software code for access by a processor using the first encryption scheme. The method includes receiving a call for an entry point of the operating system. The method includes determining a second encryption scheme to be used with the entry point when mapped to the virtual memory. The method includes mapping a second portion of the virtual memory for executing entry point code associated with the entry point for access by the processor using the second encryption scheme. The processor executing the software code is permitted to access only data from the first and second portions of the virtual memory.