Patents by Inventor Matic Krivec

Matic Krivec has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240060944
    Abstract: A sensor chip includes a substrate and one or more chemo-resistive gas sensing elements attached to the substrate. Each gas sensing element provides a signal depending on one or more gases to be sensed. A catalytic gas filter arrangement includes one or more filter sections, each filter section including a cavity covered with at least one membrane. The at least one membrane is supported by a support structure and includes gas permeable pores. A surface defining the pores includes a catalytic material for degrading one or more of the gases. The gas filter arrangement is arranged so at least one of the chemo-resistive gas sensing elements is exposed to a filtered mixture of the gases in the cavity of one of the filter sections. The filtered mixture of gases is obtained by filtering the ambient mixture of the one or more gases with the one of the filter sections.
    Type: Application
    Filed: August 18, 2023
    Publication date: February 22, 2024
    Inventors: Alexandra Marina Roth, Matic Krivec, Alexander Zöpfl, Dominic Maier, Markus Meyer, Werner Breuer
  • Publication number: 20230148014
    Abstract: A MEMS component is described herein, which according to one exemplary embodiment includes: a semiconductor body; an insulation layer arranged on the semiconductor body; a boundary structure arranged on the insulation layer, the semiconductor body including an opening below the boundary structure; first and second structured electrodes arranged on the insulation layer; and a piezoelectric layer comprising a thermoplastic, and at least partially bounded by the boundary structure and arranged on the insulation layer and on the first and second electrodes.
    Type: Application
    Filed: October 25, 2022
    Publication date: May 11, 2023
    Inventors: Thomas Grille, Elmar Aschauer, Ulf Bartl, Christoph Kovatsch, Matic Krivec, Thomas Ostermann, Lukas Praster, Gerald Stocker
  • Publication number: 20230087922
    Abstract: A temperature-regulated chemi-resistive gas sensor includes a sensor surface including a chemically sensitive sensor layer including an active material for adsorbing and desorbing gas molecules of an analyte gas. A predetermined time-continuous periodic temperature profile is applied for periodically heating the sensor surface. An electrical sensor layer conductance signal is determined and time windows are applied to the sensor layer conductance signal. For one or more of the time windows, discrete frequency spectrum data of the sensor layer conductance signal is obtained, and a current gas concentration of the analyte gas is determined based on the obtained discrete frequency spectrum data.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 23, 2023
    Inventors: Werner Breuer, Matic Krivec, Markus Meyer, Michael Emmert, Alexandra Marina Roth, Alexander Zoepfl
  • Patent number: 11610817
    Abstract: A method of processing a semiconductor wafer includes: forming a first metal layer or metal layer stack on a backside of the semiconductor wafer; forming a plating preventative layer on the first metal layer or metal layer stack, the plating preventative layer being formed at least over a kerf region of the semiconductor wafer and such that part of the first metal layer or metal layer stack is uncovered by the plating preventative layer, wherein the kerf region defines an area for dividing the semiconductor wafer along the kerf region into individual semiconductor dies; and plating a second metal layer or metal layer stack on the part of the first metal layer or metal layer stack uncovered by the plating preventative layer, wherein the plating preventative layer prevents plating of the second metal layer or metal layer stack over the kerf region.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: March 21, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Andreas Kitzler, John Cooper, Jakob Simon Dohr, Michael Knabl, Matic Krivec, Daniel Pieber
  • Publication number: 20220301933
    Abstract: A method of processing a semiconductor wafer includes: forming a first metal layer or metal layer stack on a backside of the semiconductor wafer; forming a plating preventative layer on the first metal layer or metal layer stack, the plating preventative layer being formed at least over a kerf region of the semiconductor wafer and such that part of the first metal layer or metal layer stack is uncovered by the plating preventative layer, wherein the kerf region defines an area for dividing the semiconductor wafer along the kerf region into individual semiconductor dies; and plating a second metal layer or metal layer stack on the part of the first metal layer or metal layer stack uncovered by the plating preventative layer, wherein the plating preventative layer prevents plating of the second metal layer or metal layer stack over the kerf region.
    Type: Application
    Filed: March 19, 2021
    Publication date: September 22, 2022
    Inventors: Andreas Kitzler, John Cooper, Jakob Simon Dohr, Michael Knabl, Matic Krivec, Daniel Pieber