Abstract: The invention relates to an apparatus in a computer system for transmitting signals from one processor to one or several other processors connected to the same bus system so that the signals having priority are transmitted without time delay and that the sequence of signals without priority is not changed. Each processor contains a sender buffer for sending all the signals and a queue buffer for storing signals without priority. If signals having no priority prevent signals having priority from being transmitted through the bus system because of congestion in the receiving equipment, the apparatus allows such signal having no priority to move from the sender buffer to the first place in said queue buffer.