Patents by Inventor Matsuaki Terada
Matsuaki Terada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5303344Abstract: A communication control equipment connected between a computer and a network so as to perform protocol processing at a high speed, has a buffer memory connected between a computer interface circuit and a network interface circuit through a first path for data transfer, so as to temporarily store communication data, and a protocol processor connected between the computer interface circuit and the network interface circuit through a second path for control information transfer. The protocol processor is also connected to the buffer memory through a third path so as to effect protocol processing on the communication data within the buffer memory.Type: GrantFiled: February 25, 1991Date of Patent: April 12, 1994Assignee: Hitachi, Ltd.Inventors: Tatsuya Yokoyama, Susumu Matsui, Matsuaki Terada, Tetsuhiko Hirata, Mika Mizutani
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Patent number: 5247620Abstract: A bridge apparatus for interconnecting networks in which at least two networks including a plurality of stations are connected, and which, when a transmission frame including an identifier of one station and an identifier of another station of a destination is received from the one station, forwards the transmission frame to a network to which the another station belongs based on the identifier of another station. A processor of the bridge apparatus for interconnecting networks performs delivery control of the transmission frame using an information which has been read out of an address check circuit for identifying the network to which the another station belongs with the identifier of the another station which is included in the transmission frame.Type: GrantFiled: July 20, 1990Date of Patent: September 21, 1993Assignees: Hitachi, Ltd., Hitachi Cable Ltd.Inventors: Junji Fukuzawa, Akira Watanabe, Matsuaki Terada, Sadao Mizokawa
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Patent number: 5247518Abstract: A high-speed ring LAN capable of accommodating at least one public network having a signal transmission rate of 155.57 MHz, and at least one sub-LAN having a signal transmission rate of 100 MHz. The high-speed LAN has a signal transmission rate of 155.52 Mbps .times.n (n is an even number). SONET (Synchronous Optical NETwork) subframes each comprising a 9 bytes .times.9 section overhead area and a 261 bytes .times.9 virtual container 4 (VC-4) area flow in a time-divisional n-multiplexed format. The respective node devices inserted in the transmission path have one or more ports to accommodate sub-LANs or public networks. Information is exchanged in units of a fixed-length packet between a received SONET subframe and an asynchronous port whereas information is exchanged in units of a byte between the SONET subframe and a synchronous port.Type: GrantFiled: January 13, 1992Date of Patent: September 21, 1993Assignee: Hitachi, Ltd.Inventors: Yoshihiro Takiyasu, Toshiki Tanaka, Taihei Suzuki, Eiichi Amada, Yukiji Yamauchi, Mitsuhiro Yamaga, Matsuaki Terada, Kunio Hiyama
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Patent number: 5150365Abstract: A base-band and broad-band coexisting communication system comprises a transmission path, a plurality of first data terminal units outputting data to be transmitted in the form of pulse signals (base band signals), a plurality of second data terminal units for outputting data to be transmitted in the form of modulated signals (broad band signals) each having a center frequency within a predetermined frequency range, and a plurality of low-pass filters, each connected to each of the first data transmission units, for cutting off high frequency components of the base band signal outputted by the first data terminal device at a predetermined cut-off frequency which does not overlap with the broad band signals.Type: GrantFiled: July 5, 1990Date of Patent: September 22, 1992Assignees: Hitachi, Ltd., Yagi Antenna Co., Ltd.Inventors: Tetsuhiko Hirata, Kazuo Yagyu, Matsuaki Terada, Hiroshi Nakase, Shigeru Oshima, Motoyoshi Morito, Takahiko Nishizawa
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Patent number: 5103447Abstract: A high-speed ring LAN capable of accommodating at least one public network having a signal transmission rate of 155.57 MHz, and at least one sub-LAN having a signal transmission rate of 100 MHz. The high-speed LAN has a signal transmission rate of 155.52 Mbps.times.n (n is an even number). SONET (Synchronous Optical NETwork) subframes each comprising a 9 bytes.times.9 section overhead area and a 261 bytes.times.9 virtual container 4 (VC-4) area flow in a time-divisional n-multiplexed format. The respective node devices inserted in the transmission path have one or more ports to accommodate sub-LANs or public networks. Information is exchanged in units of a fixed-length packet between a received SONET subframe and an asynchronous packet whereas information is exchanged in units of a byte between the SONET subframe and a synchronous port.Type: GrantFiled: August 29, 1989Date of Patent: April 7, 1992Assignee: Hitachi, Ltd.Inventors: Yoshihiro Takiyasu, Toshiki Tanaka, Taihei Suzuki, Eiichi Amada, Yukiji Yamauchi, Mitsuhiro Yamaga, Matsuaki Terada, Kunio Hiyama
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Patent number: 5086426Abstract: In a network system comprising a plurality of secondary LAN's of different types operable at a relatively low speed, a single primary LAN accommodating the secondary LAN's and operable at a relatively high speed, and a plurality of bridges for connecting the primary LAN and the secondary LAN's, a communication frame transmitting on the primary LAN includes an identifier representative of the type of a secondary LAN to which a source terminal belongs and a bridge receiving the primary LAN frame carries out a protocol processing on the basis of the identifier representative of the type of the secondary LAN.Type: GrantFiled: December 20, 1988Date of Patent: February 4, 1992Assignee: Hitachi, Ltd.Inventors: Masato Tsukakoshi, Yasuhiro Takahashi, Matsuaki Terada, Kenji Kusaka
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Patent number: 5056058Abstract: A protocol high-speed processing method to be used in a first communication control equipment for communications with a second communication equipment connected through a transmission line in accordance with a predetermined communication protocol. The communication control equipment predicts the type of communication frame to be received next from the communication line, in accordance with type of communication frame previously transmitted to or received from said transmission line, and prepares information necessary for a process of receiving said predicted communication frame and information of a part of the communication frame to be transmitted subsequent to the receiving process, to await the reception of a next communication frame. As a result, the receiving process time and the response process time can be reduced when the actually received communication frame is consistent with the predicted one.Type: GrantFiled: March 5, 1990Date of Patent: October 8, 1991Assignee: Hitachi, Ltd.Inventors: Tetsuhiko Hirata, Susumu Matsui, Matsuaki Terada, Tatsuya Yokoyama, Sinichi Kouyama
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Patent number: 5018133Abstract: In a network system according to the hierarchical routing method, in which at least one main LAN and a plurality of sub-LANs are connected hierarchically through bridges, bridge IDs having the smallest values in the network are given to a plurality of bridges (first bridges) connected to the main LAN. Bridge IDs unique to each other having values greater than the bridge IDs of the first bridges are given to a plurality of bridges (second bridges) connecting sub-LANs. Each of the first bridges transmits periodically a control message (Hello message) for making the network in a tree structure by using some of the second bridges as backup bridges to the side of the sub-LANs. When a change takes place in the topology of the network, the reconstruction of the tree structure is effected in a localized part of the network including a position of hindrance, the root of the network being constituted by a particular first bridge.Type: GrantFiled: September 6, 1990Date of Patent: May 21, 1991Assignee: Hitachi, Ltd.Inventors: Masato Tsukakoshi, Yasuhiro Takahashi, Matsuaki Terada, Nobuyuki Takagishi
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Patent number: 4941084Abstract: A resource management system and method in a distributed processing system in which a plurality of computers are interconnected through a transmission line. A computer makes, upon accessing to a resource of another computer, inquiries about "Whether the intended resource exists" and "Ordering that if the intended resource exists, the interrogated computer should return a response indicative of attribute information of that resource" by using a so-called broadcasting function to simultaneously apprize all the computers constituting the distributed processing system of the same message.Type: GrantFiled: May 27, 1988Date of Patent: July 10, 1990Assignee: Hitachi, Ltd.Inventors: Matsuaki Terada, Hiroshi Wataya, Satoru Takagi, Masao Sueki
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Patent number: 4881167Abstract: A data memory system includes a plurality of buffer regions each having a constant size so that serial data may be stored by linking the buffer regions. A descripter provided to correspond to each of the buffer regions includes memory region addressing information indicating the head address of the corresponding buffer region, data delimiting information indicating whether or not the data to be stored is terminated in the corresponding buffer region, and chain information indicating the head address of a next subsequent descripter.Type: GrantFiled: March 2, 1989Date of Patent: November 14, 1989Assignee: Hitachi, Ltd.Inventors: Hisao Sasaki, Matsuaki Terada, Susumu Matsui, Kenji Kawakita, Jiro Kashio, Shiro Baba, Yasushi Akao, Toshio Okochi
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Patent number: 4516221Abstract: A data communication system including reflectors having first light emitting elements for radiating light and first light receiving elements for receiving light, a plurality of transceivers disposed confronting said reflectors and having second light emitting elements for radiating light and second light receiving elements for receiving light, and a data processing unit to be connected to the transceivers, wherein light corresponding to the data to be transmitted from the data processing unit is converged and radiated from the second light emitting element of the transceiver to the reflector, the light from the transceiver is received by the first light receiving element of the reflector, light corresponding to the data thus received is radiated from the light emitting element of the reflector to all of the transceivers confronting said reflector and is received by the second light receiving elements of the transceivers, and the data thus received is sent to the data processing unit.Type: GrantFiled: June 21, 1982Date of Patent: May 7, 1985Assignees: Hitachi, Ltd., Yagi Antenna Co., Ltd.Inventors: Yukio Nakata, Matsuaki Terada, Kaoru Suda, Motoyoshi Morito, Osamu Shiotsu
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Patent number: 4453247Abstract: In a speech packet switching system, an input speech signal to a speech packet transmitting station is converted to a digital signal to form speech data blocks, which are discriminated to talkspurt blocks and silence blocks, and only the talkspurt speech blocks are packetized and transmitted through a speech packet switching network. In a receiving station, a series of speech packets received in one talkspurt period are temporarily stored in a variance absorbing buffer to compensate for a variance of transmission delay times resulting from the transmission through said speech packet switching network to add variance absorbing times to the speech packets depending on the transmission delay times of the respective speech packets. Then the speech packets are sequentially reproduced.Type: GrantFiled: March 3, 1982Date of Patent: June 5, 1984Assignee: Hitachi, Ltd.Inventors: Michio Suzuki, Matsuaki Terada, Takao Kato, Ryuichi Toki
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Patent number: 4447871Abstract: A data communication system which includes a data distributor, a communication station and a plurality of front-end-processors. These front-end-processors are connected with a computer through a common bus. The distributor distributes the data received by the station to one available front-end-processor, which preprocesses the received data, and transfers the pre-processed data to the computer through the bus. By operating the front-end-processors in parallel with respect to successively received packets of data, the processing speed of the system is increased.Type: GrantFiled: February 2, 1981Date of Patent: May 8, 1984Assignee: Hitachi, Ltd.Inventors: Matsuaki Terada, Koji Yokota