Patents by Inventor Matsuo Iwasaki

Matsuo Iwasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9336895
    Abstract: A semiconductor unit with memory devices, each of the memory devices includes: a first semiconductor layer; second and third semiconductor layers; a first dielectric film and a first conductive film; first, second, and third electrodes electrically connected to the second semiconductor layer, the third semiconductor layer, and the first conductive film, respectively, the third electrode being electrically connected to the first electrode. In the memory devices, when a voltage equal to or higher than a predetermined threshold value is applied between the first and second electrodes, a filament that is a conductive path electrically linking the second and third semiconductor layers is formed in the region between the second and third semiconductor layers, and thereby, writing operation of information is performed.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: May 10, 2016
    Assignee: SONY CORPORATION
    Inventors: Yuki Yanagisawa, Shigeru Kanematsu, Matsuo Iwasaki
  • Publication number: 20150302932
    Abstract: A semiconductor unit with memory devices, each of the memory devices includes: a first semiconductor layer; second and third semiconductor layers; a first dielectric film and a first conductive film; first, second, and third electrodes electrically connected to the second semiconductor layer, the third semiconductor layer, and the first conductive film, respectively, the third electrode being electrically connected to the first electrode. In the memory devices, when a voltage equal to or higher than a predetermined threshold value is applied between the first and second electrodes, a filament that is a conductive path electrically linking the second and third semiconductor layers is formed in the region between the second and third semiconductor layers, and thereby, writing operation of information is performed.
    Type: Application
    Filed: April 8, 2013
    Publication date: October 22, 2015
    Inventors: Yuki Yanagisawa, Shigeru Kanematsu, Matsuo Iwasaki
  • Patent number: 8797782
    Abstract: An operation method of a semiconductor device, includes providing one or more memory elements each including a first semiconductor layer, second and third semiconductor layers, a dielectric film and a conductive film, a first electrode, a second electrode, and a third electrode, and performing operation of writing information on a memory element to be driven of the one or more memory elements. The operation of writing is performed by forming a filament in a region between the second and third semiconductor layers, which is a conductive path electrically linking these semiconductor layers, the filament being formed by causing a dielectric breakdown of at least a part of the dielectric film, through application of a voltage equal to or higher than a predetermined threshold between the second and third electrodes, thereby causing an electric current to flow between the conductive film and the third semiconductor layer.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: August 5, 2014
    Assignee: Sony Corporation
    Inventors: Shigeru Kanematsu, Yuki Yanagisawa, Matsuo Iwasaki
  • Patent number: 8611129
    Abstract: An operation method of a semiconductor device, includes providing one or more memory elements each including a first semiconductor layer of a first conductivity type, second and third semiconductor layers of a second conductivity type, which are disposed to be separated from each other in the first semiconductor layer, a first electrode electrically connected to the second semiconductor layer, and a second electrode electrically connected to the third semiconductor layer, and performing operation of writing information on a memory element to be driven of the one or more memory elements. The operation of writing is performed by forming a filament in a region between the second and third semiconductor layers, which is a conductive path electrically linking these semiconductor layers, through application of a voltage equal to or higher than a predetermined threshold between the first electrode and the second electrode.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: December 17, 2013
    Assignee: Sony Corporation
    Inventors: Shigeru Kanematsu, Yuki Yanagisawa, Matsuo Iwasaki
  • Publication number: 20120212992
    Abstract: An operation method of a semiconductor device, includes providing one or more memory elements each including a first semiconductor layer, second and third semiconductor layers, a dielectric film and a conductive film, a first electrode, a second electrode, and a third electrode, and performing operation of writing information on a memory element to be driven of the one or more memory elements. The operation of writing is performed by forming a filament in a region between the second and third semiconductor layers, which is a conductive path electrically linking these semiconductor layers, the filament being formed by causing a dielectric breakdown of at least a part of the dielectric film, through application of a voltage equal to or higher than a predetermined threshold between the second and third electrodes, thereby causing an electric current to flow between the conductive film and the third semiconductor layer.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 23, 2012
    Applicant: SONY CORPORATION
    Inventors: Shigeru Kanematsu, Yuki Yanagisawa, Matsuo Iwasaki
  • Publication number: 20120212991
    Abstract: An operation method of a semiconductor device, includes providing one or more memory elements each including a first semiconductor layer of a first conductivity type, second and third semiconductor layers of a second conductivity type, which are disposed to be separated from each other in the first semiconductor layer, a first electrode electrically connected to the second semiconductor layer, and a second electrode electrically connected to the third semiconductor layer, and performing operation of writing information on a memory element to be driven of the one or more memory elements. The operation of writing is performed by forming a filament in a region between the second and third semiconductor layers, which is a conductive path electrically linking these semiconductor layers, through application of a voltage equal to or higher than a predetermined threshold between the first electrode and the second electrode.
    Type: Application
    Filed: January 30, 2012
    Publication date: August 23, 2012
    Applicant: SONY CORPORATION
    Inventors: Shigeru Kanematsu, Yuki Yanagisawa, Matsuo Iwasaki