Patents by Inventor Matt Tolton

Matt Tolton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8365016
    Abstract: In one embodiment, the present invention includes a method for selecting a first transaction execution mode to begin a first transaction in a unbounded transactional memory (UTM) system having a plurality of transaction execution modes. These transaction execution modes include hardware modes to execute within a cache memory of a processor, a hardware assisted mode to execute using transactional hardware of the processor and a software buffer, and a software transactional memory (STM) mode to execute without the transactional hardware. The first transaction execution mode can be selected to be a highest performant of the hardware modes if no pending transaction is executing in the STM mode, otherwise a lower performant mode can be selected. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: January 29, 2013
    Assignee: Intel Corporation
    Inventors: Jan Gray, Martin Taillefer, Yossi Levanoni, Ali-Reza Adl-Tabatabai, Dave Detlefs, Vinod Grover, Mike Magruder, Matt Tolton, Bratin Saha, Gad Sheaffer, Vadim Bassin
  • Publication number: 20120079215
    Abstract: In one embodiment, the present invention includes a method for selecting a first transaction execution mode to begin a first transaction in a unbounded transactional memory (UTM) system having a plurality of transaction execution modes. These transaction execution modes include hardware modes to execute within a cache memory of a processor, a hardware assisted mode to execute using transactional hardware of the processor and a software buffer, and a software transactional memory (STM) mode to execute without the transactional hardware. The first transaction execution mode can be selected to be a highest performant of the hardware modes if no pending transaction is executing in the STM mode, otherwise a lower performant mode can be selected. Other embodiments are described and claimed.
    Type: Application
    Filed: November 30, 2011
    Publication date: March 29, 2012
    Inventors: Jan Gray, Martin Taillefer, Yossi Levanoni, Ali-Reza Adl-Tabatabai, Dave Detlefs, Vinod Grover, Mike Magruder, Matt Tolton, Bratin Saha, Gad Sheaffer, Vadim Bassin
  • Patent number: 8095824
    Abstract: In one embodiment, the present invention includes a method for selecting a first transaction execution mode to begin a first transaction in a unbounded transactional memory (UTM) system having a plurality of transaction execution modes. These transaction execution modes include hardware modes to execute within a cache memory of a processor, a hardware assisted mode to execute using transactional hardware of the processor and a software buffer, and a software transactional memory (STM) mode to execute without the transactional hardware. The first transaction execution mode can be selected to be a highest performant of the hardware modes if no pending transaction is executing in the STM mode, otherwise a lower performant mode can be selected. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: January 10, 2012
    Assignee: Intel Corporation
    Inventors: Jan Gray, Martin Taillefer, Yossi Levanoni, Ali-Reza Adl-Tabatabai, Dave Detlefs, Vinod Grover, Mike Magruder, Matt Tolton, Bratin Saha, Gad Sheaffer, Vadim Bassin
  • Publication number: 20110145637
    Abstract: In one embodiment, the present invention includes a method for selecting a first transaction execution mode to begin a first transaction in a unbounded transactional memory (UTM) system having a plurality of transaction execution modes. These transaction execution modes include hardware modes to execute within a cache memory of a processor, a hardware assisted mode to execute using transactional hardware of the processor and a software buffer, and a software transactional memory (STM) mode to execute without the transactional hardware. The first transaction execution mode can be selected to be a highest performant of the hardware modes if no pending transaction is executing in the STM mode, otherwise a lower performant mode can be selected. Other embodiments are described and claimed.
    Type: Application
    Filed: December 15, 2009
    Publication date: June 16, 2011
    Inventors: Jan Gray, Martin Taillefer, Yossi Levanoni, Ali-Reza Adl-Tabatabai, Dave Detlefs, Vinod Grover, Mike Magruder, Matt Tolton, Bratin Saha, Gad Sheaffer, Vadim Bassin