Patents by Inventor Matteo BRIVIO

Matteo BRIVIO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230228806
    Abstract: A system for testing is provided. The system includes an electronic circuit and an automatic testing equipment (ATE). The electronic circuit includes a voltage monitor including a resistive divider receiving at its voltage input an input voltage and coupled at its output to an input of a comparator. A reference input of the comparator is coupled to a generator supplying a reference voltage setting one or more thresholds of the comparator. The electronic circuit includes a Built In Self Test Module coupled to the ATE and to the inputs and output of the comparator. The BIST module is being configured upon receiving respective commands from the ATE to test a reaction time of the comparator and an offset of the comparator. The ATE performs a respective test of the ratio of the resistor divider by a first voltage measurement and a test of the reference voltage provided by the generator.
    Type: Application
    Filed: January 6, 2023
    Publication date: July 20, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Nicola DE CAMPO, Matteo VENTURELLI, Matteo BRIVIO, Mauro FOPPIANI
  • Publication number: 20230140765
    Abstract: A digital-to-analog converter (DAC) includes a switching network and built-in-self-test (BIST) circuitry. The DAC, in operation, generates analog output signals in response to input codes of a set of input codes of the DAC. The BIST circuitry sequentially applies codes of a determined subset of codes of the set of input codes to test the plurality of switches. The determined subset of codes has fewer codes than the set of input codes. The BIST circuitry detects failures of switches of the plurality of switches based on responses of the DAC to the applied codes. In response to detecting a failure of a switch, the BIST generates a signal indicating a failure of the switching network.
    Type: Application
    Filed: October 17, 2022
    Publication date: May 4, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Leonardo PEDONE, Simone SCADUTO, Rossella GAUDIANO, Matteo BRIVIO, Matteo VENTURELLI
  • Publication number: 20230079831
    Abstract: A system, method, and device to test an electronic circuit are disclosed having a stage to supply a driving signal to a load comprising a pull-up switch and a pull-down switch and a pre-driver stage including pre-driver circuits. The electronic circuit including circuits for testing the pre-driver stage under the control of an automatic testing equipment (ATE) to operate a built-in self-test sequence including test commands for the pre-driver stage under the control of an external test signal issued by the ATE. The system includes a time measuring circuit to measure duration of signals at the output of the stage coupled to a pass-fail check circuit, and to evaluate if the duration of signals at the output of the stage to determine whether the output satisfies a pass criterion.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 16, 2023
    Inventors: Matteo Brivio, Nicola De Campo, Matteo Venturelli
  • Patent number: 11531064
    Abstract: In an embodiment a method for testing a digital electronic circuit includes coupling an external test equipment to a digital electronic circuit in order to apply an external voltage signal to the digital electronic circuit when an automatic test pattern generation (ATPG) procedure with a given test pattern is performed, wherein a value of the external voltage signal is controlled by the external test equipment and measuring, at the external test equipment, the digital supply voltage at an output of the voltage regulator and at an input of the internal digital circuitry, wherein the external voltage signal is applied to the differential inputs of the op-amp voltage regulator through an adaptation circuit to obtain determined values of the digital supply voltage.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: December 20, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventors: Matteo Brivio, Matteo Venturelli, Nicola De Campo
  • Publication number: 20220137131
    Abstract: In an embodiment a method for testing a digital electronic circuit includes coupling an external test equipment to a digital electronic circuit in order to apply an external voltage signal to the digital electronic circuit when an automatic test pattern generation (ATPG) procedure with a given test pattern is performed, wherein a value of the external voltage signal is controlled by the external test equipment and measuring, at the external test equipment, the digital supply voltage at an output of the voltage regulator and at an input of the internal digital circuitry, wherein the external voltage signal is applied to the differential inputs of the op-amp voltage regulator through an adaptation circuit to obtain determined values of the digital supply voltage.
    Type: Application
    Filed: October 29, 2021
    Publication date: May 5, 2022
    Inventors: Matteo Brivio, Matteo Venturelli, Nicola De Campo
  • Patent number: 9176191
    Abstract: An electronic device includes an electronic component having terminals including a set of first terminals and a set of second terminals, a protective package embedding the electronic component, leads exposed from the protective package including a set of first leads and a set of second leads, for each first lead a first electrical connection inside the protection package between the first lead and a corresponding one of the first terminals, and for each second lead electrical connections inside the protective package each one between the second lead and a corresponding one of the second terminals. For each second lead the electronic component includes test structures, each being coupled between a corresponding one of the second terminals connected to the second lead and a corresponding test one of the first terminals connected to a test one of the first leads.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: November 3, 2015
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Giorgio Rossi, Carlo Caimi, Matteo Brivio
  • Publication number: 20130335107
    Abstract: An electronic device includes an electronic component having terminals including a set of first terminals and a set of second terminals, a protective package embedding the electronic component, leads exposed from the protective package including a set of first leads and a set of second leads, for each first lead a first electrical connection inside the protection package between the first lead and a corresponding one of the first terminals, and for each second lead electrical connections inside the protective package each one between the second lead and a corresponding one of the second terminals. For each second lead the electronic component includes test structures, each being coupled between a corresponding one of the second terminals connected to the second lead and a corresponding test one of the first terminals connected to a test one of the first leads.
    Type: Application
    Filed: June 10, 2013
    Publication date: December 19, 2013
    Inventors: Giorgio ROSSI, Carlo CAIMI, Matteo BRIVIO