Abstract: Various embodiments described herein relate to systems, apparatuses, products, and methods for light detection. In various embodiments, a pixel for detecting light is provided. The pixel may include a substrate configured to generate one or more carriers in response to an incident light beam, a first vertical gate and a second vertical gate disposed inside the substrate, and a first planar gate and a second planar gate disposed on the substrate. The first and second planar gates may be configured to direct the one or more carriers from the transfer zone to a first sensing node or a second sensing node.

Abstract: The present disclosure relates to a DAC that includes: a first pixel including a first transfer gate coupling a memory node of the first pixel and a capacitive sensing node (SN); a second pixel comprising a first transfer gate coupling a memory node of the second pixel and the capacitive SN; a reset transistor coupling the sensing node to a first voltage supply rail; and a control circuit configured to store electrical charge by activating the reset transistor to apply a reference voltage to the memory node of each of the first and second pixels; and generate a voltage of the DAC at the sensing node by deactivating the reset transistor and controlling the first transfer gates of the first and second pixels to transfer the charge stored.

Abstract: An embodiment light sensor includes an array of pixels arranged in rows and in columns. Each pixel comprises a photodiode, a sense node coupled to the photodiode, and an initialization transistor connected to the sense node. N successive pixels of a column or of a row are associated, where N is greater than or equal to 2. The initialization transistor of a first one of the pixels arranged at one end of the association of the N pixels is connected between the sense node of the first one of the pixels and a node of application of an initialization potential. For each two successive pixels among the N pixels, the initialization transistor of one of the pixels that is the most distant from the end is connected between the sense nodes of the two pixels.

Abstract: The present description describes an image sensor including an array of pixels arranged inside and on top of a region of a semiconductor substrate electrically insulated from the rest of the substrate by insulating trenches crossing the substrate, each pixel including a photoconversion area and at least two assemblies, each including a memory area and a transfer gate coupling the memory area to the photoconversion area, and a circuit configured to apply, for each pixel and at least during each integration phase, a bias voltage different from ground to a portion of the substrate having the pixel arranged inside and on top of it.

Abstract: An indirect time-of-flight (iTOF) includes a pixel with a photoconversion area, a readout circuit and at least two circuit sets. Each circuit set includes: a capacitive element connected to a first node of the circuit set; a controllable charge transfer device connected between a first electrode of the photoconversion area and the first node; and a first transistor having a gate connected to the first node, a source connected to the readout circuit and a drain configured to receive a bias potential. The capacitive element is configured to store a voltage in response to charges generated by the photoconversion area.

Abstract: The present description concerns a sensor and method. Each pixel of the sensor comprises assemblies each including a memory area and a transfer device coupling the memory area to a photoconversion area, and a device for resetting the memory areas. The sensor includes a first circuit controlling the transfer devices and a second circuit controlling the reset devices. During each integration phase, the second circuit orders the end of a phase of reset of the memory areas of first pixels at the beginning of the integration phase and the end of a phase of reset of the memory areas of second pixels at a time subsequent to the beginning of the integration phase.

Abstract: The present description describes an image sensor including an array of pixels arranged inside and on top of a region of a semiconductor substrate electrically insulated from the rest of the substrate by insulating trenches crossing the substrate, each pixel including a photoconversion area and at least two assemblies, each including a memory area and a transfer gate coupling the memory area to the photoconversion area, and a circuit configured to apply, for each pixel and at least during each integration phase, a bias voltage different from ground to a portion of the substrate having the pixel arranged inside and on top of it.

Abstract: The present disclosure relates to a device that includes a photodiode having a first terminal that is coupled by a resistor to a first rail configured to receive a high supply potential and a second terminal that is coupled by a switch to a second rail configured to receive a reference potential. A read circuit is configured to provide a pulse when the photodiode enters into avalanche, and a control circuit is configured to control an opening of the switch in response to a beginning of the pulse and to control a closing of the switch in response to an end of the pulse.

Abstract: The present disclosure relates to a device that includes a photodiode having a first terminal that is coupled by a resistor to a first rail configured to receive a high supply potential and a second terminal that is coupled by a switch to a second rail configured to receive a reference potential. A read circuit is configured to provide a pulse when the photodiode enters into avalanche, and a control circuit is configured to control an opening of the switch in response to a beginning of the pulse and to control a closing of the switch in response to an end of the pulse.