Patents by Inventor Matthew A. Lambert

Matthew A. Lambert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cache coherency arrangement to enhance inbound bandwidth
    Patent number: 6842827
    Abstract: A cache coherency arrangement with support for pre-fetch ownership, to enhance inbound bandwidth for single leaf and multiple leaf, input-output interfaces, with shared memory space is disclosed. Embodiments comprise ownership stealing to enhance inbound bandwidth and to prevent or attenuate starvation of transactions or of an input-output interface for transactions.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: January 11, 2005
    Assignee: Intel Corporation
    Inventors: Robert G. Blankenship, Matthew A. Lambert, Tony S. Rand
  • Cache coherency arrangement to enhance inbound bandwidth
    Publication number: 20030126376
    Abstract: A cache coherency arrangement with support for pre-fetch ownership, to enhance inbound bandwidth for single leaf and multiple leaf, input-output interfaces, with shared memory space is disclosed. Embodiments comprise ownership stealing to enhance inbound bandwidth and to prevent or attenuate starvation of transactions or of an input-output interface for transactions.
    Type: Application
    Filed: January 2, 2002
    Publication date: July 3, 2003
    Inventors: Robert G. Blankenship, Matthew A. Lambert, Tony S. Rand