Abstract: A method of increasing the flexibility of the read out and reset functions of a CMOS image sensor is disclosed. This architecture allows new and unique modes of operation. These include the ability to read out and reset the pixels within a row simultaneously, for maximum exposure time, and the ability to reset a selected pixel or a selected group of pixels independently, without resetting any other pixels within the array, allowing the exposure time to be different than the frame time.

Abstract: A new method of forming a photogate structure called a “Charge Snare Device” (CSD) uses only a single layer of polysilicon where prior art methods used two or more layers for constructing the gate nodes. Typical CCD structures utilize three layers of polysilicon and CID structures utilize two layers of polysilicon and neither of the prior art structures are suitable for standard sub micron processes. The new CSD device allows biasing of the photogate to the full potential that the process will allow for greater full well for a given pixel size and therefore an improved signal to noise ratio. Charge transfer between the collection site and the sense site isn't controlled as in all previous devices, rather the collection site is completely enclosed by the sense site, effectively snaring all collected photon generated charge as it diffuses and drifts to the sense site. The new photogate structure is suitable for passive pixels, Active Pixel Sensors (APS) or Active Column Sensors (ACS).

Abstract: An improved low voltage, small surface area, high signal-to-noise ratio photo gate includes a layer of photoreceptive semiconductor material having an impurity concentration selected to enhance the formation of hole electron pairs in response to photons impinging on a surface of the substrate, an electrode extending from the surface of the substrate into the substrate a substantial distance; an insulating layer disposed between the electrode and the substrate for electrically insulating the electrode from the substrate; so that upon the application of an electrical potential to the electrode, a potential well is formed in the substrate surrounding the electrode for accumulating charge generated when photons impinge on the surface of the substrate surrounding the electrode.

Abstract: A CMOS imager includes a photosensitive device such as a photosensitive device such as a photodiode or photogate having a sense node coupled to an FET located adjacent to the photosensitive region. Another FET, forming a differential input pair of an operational amplifier is located outside of the array of pixels. The operational amplifier is configured for unity gain and a row or column of input FETs is connected in parallel. A correlated double sampler is connected to the output of the operational amplifier for providing a fixed pattern noise free signal.