Abstract: A computing device including a logical register file having a specified number of logical registers, each logical register storing an architected operand, and a physical register file having a specified number of physical registers, each physical register storing either a speculative operand or a architected operand. A plurality of virtual register numbers is provided that is greater than the number of logical registers plus physical registers. Each virtual register number is assigned to provide a direct index into the physical register file, with additional bits to store other information. A processor processes an instruction by using virtual numbers to directly index the physical register file to obtain any necessary input operand, or to determine that the operand is available only from the logical register file. Accordingly, the physical register file contains some speculative operands and some architected operands while the logical file only contains architected operands.