Patents by Inventor Matthew A. Ring

Matthew A. Ring has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8624302
    Abstract: A method of fabricating an LFCC device includes forming a first trench in a substrate that extends vertically from an upper surface to a depth within the substrate, the first trench having first sidewalls, a first bottom, and a pattern formed on the first sidewalls near the first bottom of the trench, and forming an oxide layer on the first sidewalls and first bottom of the first trench that leaves a second trench located within the first trench and is separated from the first trench by the oxide layer. The second trench has second sidewalls that are substantially vertical without showing the pattern and a second bottom that is substantially flat. The pattern compensates for the difference in oxidation rates between the bottom of the first trench and the first sidewalls. The LFCC structure includes a first trench with the pattern.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: January 7, 2014
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Matthew A. Ring, Henry G. Prosack, Jr.
  • Publication number: 20120248599
    Abstract: In one general aspect, an apparatus can include a semiconductor substrate including at least one semiconductor device, and a metal layer disposed on the semiconductor substrate. The apparatus can include a nonconductive layer defining an opening and having a cross-sectional portion of the nonconductive layer defining a protrusion disposed over a recess in the metal layer, and can include a solder bump having a portion disposed between the metal layer and the protrusion defined by the nonconductive layer.
    Type: Application
    Filed: March 21, 2012
    Publication date: October 4, 2012
    Inventor: Matthew A. Ring
  • Publication number: 20110193142
    Abstract: A method of fabricating an LFCC device includes forming a first trench in a substrate that extends vertically from an upper surface to a depth within the substrate, the first trench having first sidewalls, a first bottom, and a pattern formed on the first sidewalls near the first bottom of the trench, and forming an oxide layer on the first sidewalls and first bottom of the first trench that leaves a second trench located within the first trench and is separated from the first trench by the oxide layer. The second trench has second sidewalls that are substantially vertical without showing the pattern and a second bottom that is substantially flat. The pattern compensates for the difference in oxidation rates between the bottom of the first trench and the first sidewalls. The LFCC structure includes a first trench with the pattern.
    Type: Application
    Filed: January 27, 2011
    Publication date: August 11, 2011
    Inventors: Matthew A. Ring, Henry G. Prosack, JR.
  • Patent number: 7366575
    Abstract: Methods of controlling polishing of wafers are disclosed. In one aspect, a method may include measuring one or more pre-polish thicknesses of one or more layers of a wafer. The one or more layers may then be polished. Then a post-polish thickness of a layer of the wafer may be measured. Polishing may be controlled by using feed-forward control with the one or more pre-polish thicknesses and by using feed-back control with the post-polish thickness. Machine-accessible software to perform such methods are also disclosed as are systems in which such methods may be implemented.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: April 29, 2008
    Assignee: Intel Corporation
    Inventors: Matthew A. Ring, Scot Goerutiz, Kimberly A. Ryglelski, Anju Narendra, Kevin E. Heldrich, Brook D. Ferney
  • Publication number: 20070155284
    Abstract: Methods of controlling polishing of wafers are disclosed. In one aspect, a method may include measuring one or more pre-polish thicknesses of one or more layers of a wafer. The one or more layers may then be polished. Then a post-polish thickness of a layer of the wafer may be measured. Polishing may be controlled by using feed-forward control with the one or more pre-polish thicknesses and by using feed-back control with the post-polish thickness. Machine-accessible software to perform such methods are also disclosed as are systems in which such methods may be implemented.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Inventors: Matthew Ring, Scot Goerutiz, Kimberly Ryglelski, Anju Narendra, Kevin Heldrich, Brook Ferney