Abstract: Heat pipe assemblies for Information Handling Systems (IHSs). In some embodiments, an IHS may comprise a motherboard including a Central Processing Unit (CPU); a cooling system coupled to the motherboard, the cooling system including a heat pipe, the CPU coupled to a first side of the heat pipe; and a daughterboard coupled to the motherboard and including a Graphics Processing Unit (GPU) coupled to a second side of the heat pipe. In other embodiments, a method may include providing a motherboard including a CPU; coupling a cooling system to the motherboard, the cooling system including a heat pipe, the CPU coupled to a first side of the heat pipe; and coupling a daughterboard to the motherboard, the daughterboard including a GPU coupled to a second side of the heat pipe.

Abstract: Heat pipe assemblies for Information Handling Systems (IHSs). In some embodiments, an IHS may comprise a motherboard including a Central Processing Unit (CPU); a cooling system coupled to the motherboard, the cooling system including a heat pipe, the CPU coupled to a first side of the heat pipe; and a daughterboard coupled to the motherboard and including a Graphics Processing Unit (GPU) coupled to a second side of the heat pipe. In other embodiments, a method may include providing a motherboard including a CPU; coupling a cooling system to the motherboard, the cooling system including a heat pipe, the CPU coupled to a first side of the heat pipe; and coupling a daughterboard to the motherboard, the daughterboard including a GPU coupled to a second side of the heat pipe.

Abstract: A restart controller for an information handling system includes a first latch and a second latch. An output of the second latch is coupled to an input of the first latch. The restart controller is configured to detect that the information handling system has been shut down responsive to a first disorderly shutdown, and in response to detecting the shut down, to set the first latch, initiate a first startup of the information handling system to enable a remote wake mechanism of a chipset of the information handling system, and determine, at the second latch, that a basic input/output system (BIOS) of the information handling system is operational. In response to determining that the BIOS is operational, The restart controller is further configured to initiate an orderly shutdown of the information handling system, and clear the first latch.

Abstract: Disclosed are techniques for recovering system configuration settings, such as remote management, of an information handling system following a disorderly shutdown. A restart controller detects a disorderly shutdown of an information handling system and, in response, sets a disorderly shutdown flag and restarts the information handling system. During the restart, the basic input/output system (BIOS) checks the disorderly shutdown flag as part of its power-on housekeeping. In response to determining the disorderly shutdown flag has been set, the BIOS reconfigures the system configuration settings, such as the power management scheme, of the information handling system so as to enable one or more remote wake mechanisms, such as wake-on-LAN or wake-on-ring. The BIOS then performs an orderly shutdown of the information handling system to place the information handling system in a low-power state, from which the information handling system can be awoken via the remote wake mechanism.

Abstract: Disclosed are techniques for recovering system configuration settings, such as remote management, of an information handling system following a disorderly shutdown. A restart controller detects a disorderly shutdown of an information handling system and, in response, sets a disorderly shutdown flag and restarts the information handling system. During the restart, the basic input/output system (BIOS) checks the disorderly shutdown flag as part of its power-on housekeeping. In response to determining the disorderly shutdown flag has been set, the BIOS reconfigures the system configuration settings, such as the power management scheme, of the information handling system so as to enable one or more remote wake mechanisms, such as wake-on-LAN or wake-on-ring. The BIOS then performs an orderly shutdown of the information handling system to place the information handling system in a low-power state, from which the information handling system can be awoken via the remote wake mechanism.

Abstract: An information handling system comprises a first bus system comprising a plurality of connection pins wherein at least one pin is unused, at least one control line for controlling or communication with devices of the system, a controllable coupling/de-coupling unit for coupling/de-coupling the control line with the at least one previously unused pin, and a control unit for controlling the coupling/de-coupling unit coupled with the control line.

Abstract: An information handling system is provided which includes a dynamic interrupt router for balancing interrupt assignments among a plurality of devices requesting interrupt assignments. The system balances interrupt assignments among both fixed devices mounted on the processor board and interrupt assignments to devices situated in expansion slots. When the system is populated with a large number of devices relative to the number of available interrupts, improved interrupt sharing is desirably achieved by causing a device which generates a large number of interrupt requests to share a common interrupt with a device which generates a lower number of interrupts.

Abstract: A method of initializing random access memory during a BIOS process executed by a processor that is configured to perform speculative reading. The ROM BIOS is modified such that speculative reading is prevented during the memory initialization.

Abstract: An information handling system comprises a first bus system comprising a plurality of connection pins wherein at least one pin is unused, at least one control line for controlling or communication with devices of the system, a controllable coupling/de-coupling unit for coupling/de-coupling the control line with the at least one previously unused pin, and a control unit for controlling the coupling/de-coupling unit coupled with the control line.

Abstract: An information handling system is provided which includes a dynamic interrupt router for balancing interrupt assignments among a plurality of devices requesting interrupt assignments. The system balances interrupt assignments among both fixed devices mounted on the processor board and interrupt assignments to devices situated in expansion slots. When the system is populated with a large number of devices relative to the number of available interrupts, the interrupts are shared between devices which generates a high number of interrupts and devices which generate a lower number of interrupts.

Abstract: A restart circuit for a power supply of an electronic system such as a computer system for delaying the restart of the power supply until a power supply output is in compliance with a specified parameter. In one embodiment, the specified parameter is a particular threshold voltage level and the power supply output is in compliance when it is less than the particular threshold voltage level. In another embodiment of a restart circuit, the specified parameter is a rate of decay in a voltage level and the power supply output is in compliance when it is decaying at a rate less than the predetermined rate. In one embodiment, delaying the restart of the power supply permits components of the system to be reset when the voltage level of the power supply output is in a known state.

Abstract: Use of a variable voltage supply to clamp a diode for shunting signal glitches is described. Clamping the diode to a variable voltage supply enables forward-biasing of the diode, thereby preparing the diode for the glitch and effectively reducing the diode's turn-on time. The voltage of the variable voltage supply is determined by the size of the clamping diode used and the magnitude of the glitch it is designed to shunt. In one embodiment, the variable voltage supply is a temperature compensated voltage supply, such that as the temperature, and hence, the capacitance, of the diode changes, the value of the variable voltage supply also changes accordingly.

Abstract: A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches the processor to its unrestricted mode of operation. When running a multi-tasking operating system where an application program is being executed in a restricted mode, a suspend/resume operation can be carried out in which the system is substantially powered down and then powered back up, and will resume the interrupted application with the restricted mode back in effect. Further, set-up changes such as adjustment of the processor speed can be made without exiting the application program running in the restricted mode.

Abstract: A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches the processor to its unrestricted mode of operation. When running a multi-tasking operating system where an application program is being executed in a restricted mode, a suspend/resume operation can be carried out in which the system is substantially powered down and then powered back up, and will resume the interrupted application with the restricted mode back in effect. Further, set-up changes such as adjustment of the processor speed can be made without exiting the application program running in the restricted mode.

Abstract: A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches the processor to its unrestricted mode of operation. When running a multi-tasking operating system where an application program is being executed in a restricted mode, a suspend/resume operation can be carried out in which the system is substantially powered down and then powered back up, and will resume the interrupted application with the restricted mode back in effect. Further, setup changes such as adjustment of the processor speed can be made without exiting the application program running in the restricted mode.

Abstract: A method of correcting identification data stored in an EEPROM is described. Identification data stored in an EEPROM of a device such as a NIC is programmed into a flash ROM in which the host computer's BIOS is stored. During boot up of the host computer, the BIOS checksums the identification data stored in the EEPROM to determine whether it is valid. If the identification data is determined to be invalid, the EEPROM is reprogrammed with the identification data stored in the flash ROM. Optionally, a flag is set in a CMOS RAM for use by a network administrator to monitor the health of the EEPROM.

Abstract: A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches the processor to its unrestricted mode of operation. When running a multi-tasking operating system where an application program is being executed in a restricted mode, a suspend/resume operation can be carried out in which the system is substantially powered down and then powered back up, and will resume the interrupted application with the restricted mode back in effect. Further, set-up changes such as adjustment of the processor speed can be made without exiting the application program running in the restricted mode.

Abstract: A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches the processor to its unrestricted mode of operation. When running a multi-tasking operating system where an application program is being executed in a restricted mode, a suspend/resume operation can be carried out in which the system is substantially powered down and then powered back up, and will resume the interrupted application with the restricted mode back in effect. Further, set-up changes such as adjustment of the processor speed can be made without exiting the application program running in the restricted mode.

Abstract: A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches the processor to its unrestricted mode of operation. The system includes a first interrupt mask register having a bit for indicating whether an interrupt is to be recognized by the processor, a second interrupt mask register having a bit for indicating whether the interrupt is to be recognized by a further circuit, and an arrangement responsive to a load of the first mask register for conforming the bit of the second mask register to the bit of the first mask register in a manner invisible to an application program being executed by the processor.