Abstract: This disclosure describes an operational mode of a telemetry module. A device, such as a programming device, operating in accordance with the techniques of this disclosure determines that a transceiver of an implantable medical device is operating in a duty cycled operational mode that includes at least one interval during which the transceiver is powered down interleaved with intervals during which the transceiver is powered up, e.g., for transmitting or receiving communications over an established communication session. The programming device is configured to transmit information during the at least one interval in which the transceiver of the implantable medical device is powered down. Doing so ensures that the channel over which the programmer and implantable medical device communicate will not be usurped by another device.

Abstract: A device, such as an IMD, operating in accordance with the techniques of this disclosure detects a telemetry configuration event and, in response to the telemetry configuration event, configures a telemetry module of the IMD to operate in a duty cycled operational mode. The duty cycled operational mode includes a plurality of intervals during which a transceiver of the telemetry module is powered down interleaved with intervals during which the transceiver is powered up, e.g., for transmitting or receiving communications over an established communication session. The power freed up during the intervals in which the transceiver is powered down may be allocated for use by other components of the IMD. The telemetry module maintains information regarding the established communication session during the plurality of intervals during which the transceiver is powered down such that transmit and receive operations may immediately begin during intervals in which the transceiver is powered up.

Abstract: This disclosure describes an operational mode of a telemetry module. A device, such as a programming device, operating in accordance with the techniques of this disclosure determines that a transceiver of an implantable medical device is operating in a duty cycled operational mode that includes at least one interval during which the transceiver is powered down interleaved with intervals during which the transceiver is powered up, e.g., for transmitting or receiving communications over an established communication session. The programming device is configured to transmit information during the at least one interval in which the transceiver of the implantable medical device is powered down. Doing so ensures that the channel over which the programmer and implantable medical device communicate will not be usurped by another device.

Abstract: A reusable software block is adapted to control multiple instantiations of a peripheral device within a system. A device hardware abstraction layer defines offset values for registers of the peripheral device and a data structure for the peripheral device. A platform hardware abstraction layer defines an address map of the system, and is adapted to initialize each instantiation of the peripheral device via calls to the device hardware abstraction layer.

Abstract: A data bus system transfers words and word portions on a data bus between master devices and slave devices. A size bus carries a size code in fixed-byte format that identifies a number of bytes being transferred in one or more words and/or word portions of a transaction. A byte-enable bus carries a byte-enable code that identifies valid bytes of a word. An interface decodes the byte-enable codes to size codes and, where an odd-byte byte-enable code is decoded, it decodes the odd-byte byte-enable code to a plurality of size codes.

Abstract: An application specific integrated circuit, ASIC, having an advanced high-speed bus, AHB, operating in Advanced Microcontroller Bus Architecture, AMBA, and a bridge for connecting to an off-chip device is disclosed. The bridge includes a logical section and a buffer section for modifying AMBA signals to accommodate the differing clock speeds, voltages and signals required by the off-chip device. The logic section includes clock division and registers to store variables identifying the off-chip device and data being transferred from the AHB to the off-chip device. The buffer section provides any conversion of signal voltage levels between the core ASIC voltages and the input/output voltages required by the off-chip device.

Abstract: A data bus system transfers words and word portions on a data bus between master devices and slave devices. A size bus carries a size code in fixed-byte format that identifies a number of bytes being transferred in one or more words and/or word portions of a transaction. A byte-enable bus carries a byte-enable code that identifies valid bytes of a word. An interface decodes the byte-enable codes to size codes and, where an odd-byte byte-enable code is decoded, it decodes the odd-byte byte-enable code to a plurality of size codes.

Abstract: A bus bridge generally comprising a first interface, a second interface, a plurality of registers and a controller. The first interface may be connectable to a first bus having a first data width. The second interface may be connectable to a second bus having a second data width narrower than the first data width. The plurality of registers may be configured to buffer (i) data, (ii) an address, and (iii) a plurality of control signals between the first bus and the second bus. The controller configured to control the registers.

Abstract: A switch is provided with the ability to diagnose its own operation and provide signals that represent the actuation of the switch and various diagnostic outputs that indicate fault conditions or potential fault conditions with regard to either the switch or related machinery. A magnetically sensitive component, such as a Hall element, is used to provide an analog output signal that is representative of the position of an actuator to which a magnet structure is rigidly attached. As the actuator moves in response to an external force, the magnet structure moves with respect to a stationary magnetically sensitive component. The analog output from the magnetically sensitive component can be used to determine the position of the switch. Based on this information, a microprocessor provides a binary output signal indicating whether the switch is actuated or deactuated.