Patents by Inventor Matthew E. Zilmer

Matthew E. Zilmer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for securely utilizing basic input and output system (BIOS) services
    Patent number: 6892304
    Abstract: In accordance with one aspect of the current invention, the system comprises a memory for storing instruction sequences by which the processor-based system is processed, where the memory includes a physical memory and a virtual memory. The system also comprises a processor for executing the stored instruction sequences. The stored instruction sequences include process acts to cause the processor to: map a plurality of predetermined instruction sequences from the physical memory to the virtual memory, determine an offset to one of the plurality of predetermined instruction sequences in the virtual memory, receive an instruction to execute the one of the plurality of predetermined instruction sequences, transfer control to the one of the plurality of predetermined instruction sequences, and process the one of the plurality of predetermined instruction sequences from the virtual memory.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: May 10, 2005
    Assignee: Phoenix Technologies Ltd.
    Inventors: Leonard J. Galasso, Matthew E. Zilmer, Quang Phan
  • System and method for securely utilizing basic input and output system (BIOS) services
    Patent number: 6148387
    Abstract: In accordance with one aspect of the current invention, the system comprises a memory for storing instruction sequences by which the processor-based system is processed, where the memory includes a physical memory and a virtual memory. The system also comprises a processor for executing the stored instruction sequences. The stored instruction sequences include process acts to cause the processor to: map a plurality of predetermined instruction sequences from the physical memory to the virtual memory, determine an offset to one of the plurality of predetermined instruction sequences in the virtual memory, receive an instruction to execute the one of the plurality of predetermined instruction sequences, transfer control to the one of the plurality of predetermined instruction sequences, and process the one of the plurality of predetermined instruction sequences from the virtual memory.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: November 14, 2000
    Assignee: Phoenix Technologies, Ltd.
    Inventors: Leonard J. Galasso, Matthew E. Zilmer, Quang Phan