Patents by Inventor Matthew Elwood

Matthew Elwood has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060242391
    Abstract: A branch target buffer 10 is provided which maintains its entries across context switches within a virtually addressed system. Branch mispredictions are detected for individual entries 12 within the branch target buffer 10 and those individual entries are invalidated.
    Type: Application
    Filed: April 20, 2005
    Publication date: October 26, 2006
    Applicant: ARM Limited
    Inventor: Matthew Elwood
  • Publication number: 20060242392
    Abstract: A branch prediction mechanism 2 includes a history value register 4 storing a history value which is used to address into a history buffer 6 from which a plurality of prediction values are read and stored into a prediction value store 8. The one or more prediction values to be used with a potential branch instruction are selected from the prediction values store 8 using a multiplexer 10 switched by a branch predicting portion FA [4:3] of a fetch address. The history buffer 6 is only read when the history value changes whereas the prediction values store 8 is read each time a potential branch instruction is identified requiring a prediction value to be associated with it. The reduced duty cycle of the history buffer 6 saves power.
    Type: Application
    Filed: April 20, 2005
    Publication date: October 26, 2006
    Applicant: ARM Limited
    Inventor: Matthew Elwood
  • Publication number: 20060224861
    Abstract: A data processing system is operable in a first state to use a first instruction set having a first instruction set encoding. The data processing system is also operable in a second state to use a second instruction set having a second instruction encoding. Conditional branch instructions provided within the two different instruction sets are arranged to use the same instruction encoding.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Applicant: ARM Limited
    Inventors: Matthew Elwood, David Butcher, Richard Grisenthwaite
  • Publication number: 20060112262
    Abstract: A data processing system 2 includes an instruction pipeline with a branch prediction mechanism. The branch prediction mechanism includes a branch history register 20 operating to store a value GHV which can be used to identify whether a newly encountered branch instruction is one which has been previously encountered. If the branch is not one which has previously been encountered, then a not taken prediction is made. This not taken prediction is applied to both conditional and unconditional branch instructions. The instruction set of the processor core 2 supports predication instructions which render unconditional branch instructions conditional.
    Type: Application
    Filed: November 22, 2004
    Publication date: May 25, 2006
    Applicant: ARM LIMITED
    Inventor: Matthew Elwood
  • Publication number: 20050257037
    Abstract: A data processing apparatus and method are disclosed.
    Type: Application
    Filed: May 4, 2005
    Publication date: November 17, 2005
    Applicant: ARM Limited
    Inventors: Matthew Elwood, Vladimir Vasekin