Patents by Inventor Matthew F. Barr

Matthew F. Barr has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9850664
    Abstract: A handrail system includes an elongated rail member; a plurality of attachment elements slidably carried on a back side of the elongated rail member; a plurality of brackets; and a plurality of pins wherein each pin is engageable through a distal end portion of a bracket to fix the attachment element to the bracket. According to the system, the brackets can be pre-mounted at spaced-apart positions onto a wall using fasteners, and then the rail member, with the carried attachment elements, can be mounted to the brackets by slidably adjusting the attachment elements along the rail member to register with the corresponding brackets. A pin is used at each attachment element/bracket pair to fix the attachment elements to the brackets and thus the rail member to the wall.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: December 26, 2017
    Assignee: Itasca Plastics, Inc.
    Inventors: Jorge M Pinheiro, Matthew F Barr
  • Publication number: 20150102278
    Abstract: A handrail system includes an elongated rail member; a plurality of attachment elements slidably carried on a back side of the elongated rail member; a plurality of brackets; and a plurality of pins wherein each pin is engageable through a distal end portion of a bracket to fix the attachment element to the bracket. According to the system, the brackets can be pre-mounted at spaced-apart positions onto a wall using fasteners, and then the rail member, with the carried attachment elements, can be mounted to the brackets by slidably adjusting the attachment elements along the rail member to register with the corresponding brackets. A pin is used at each attachment element/bracket pair to fix the attachment elements to the brackets and thus the rail member to the wall.
    Type: Application
    Filed: October 11, 2013
    Publication date: April 16, 2015
    Applicant: Itasca Plastics Inc.
    Inventors: Jorge M. Pinheiro, Matthew F. Barr
  • Publication number: 20090144595
    Abstract: A field programmable object array integrated circuit has built-in self-testing capability. The integrated circuit comprises an array of programmable objects, a plurality of interfaces, and a controller. The array of objects is designed to operate at an operational clock speed during non-testing operation, wherein the design of the objects is not constrained to require within an object extra circuitry not essential to non-testing operation to facilitate built-in self-testing. The interfaces are connected to the objects to enable communication with the objects and to thereby facilitate built-in self-testing of the objects. The controller causes a selected subset of the objects to be activated and configured for testing, to stimulate the selected subset for some time with an input test pattern delivered via the interfaces while the selected subset of objects operates at the operational clock speed, and to observe a response of the selected subset of objects.
    Type: Application
    Filed: January 31, 2008
    Publication date: June 4, 2009
    Applicant: MathStar, Inc.
    Inventors: Richard D. Reohr, JR., Matthew F. Barr, Richard David Wiita
  • Patent number: 5832290
    Abstract: Vector register circuitry is provided which includes a vector register file comprising at least one vector register having a plurality of elements, the vector register file further having at least one data port and at least one address port for accessing selected ones of the elements of the vector register. Address generation circuitry is provided coupled to the address port and includes an adder having an output coupled to the address port, a first element register having an output coupled to a first input of the adder and an element counter having an output coupled to a second input of the adder.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: November 3, 1998
    Assignee: Hewlett-Packard Co.
    Inventors: Gary B. Gostin, Matthew F. Barr, Ruth A. McGuffey, Russell L. Roan