Patents by Inventor Matthew F. Vernon

Matthew F. Vernon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7817252
    Abstract: A holder is described for carrying a photolithography mask in a flattened condition. The holder may include a mask chuck and may be able to flatten a mask for use in photolithography. In one example, the holder may include a substrate and a plurality of independently controllable actuators coupled to the substrate and coupled to a photolithography mask to flatten the photolithography mask.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: October 19, 2010
    Assignee: Intel Corporation
    Inventor: Matthew F. Vernon
  • Publication number: 20080079927
    Abstract: A holder is described for carrying a photolithography mask in a flattened condition. The holder may include a mask chuck and may be able to flatten a mask for use in photolithography. In one example, the holder may include a substrate and a plurality of independently controllable actuators coupled to the substrate and coupled to a photolithography mask to flatten the photolithography mask.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventor: Matthew F. Vernon
  • Patent number: 6331711
    Abstract: In scanning lithography as used in the semiconductor industry, systematic variations in critical dimension feature size which depend on the substrate coordinates are compensated for in a lithography tool. This is done by determining (experimentally or theoretically) low frequency variations in the critical dimensions on the target caused by imperfections in the lithography tool and/or the resist and/or the process steps. These low frequency spatial errors are compensated for, after the primary scanning exposure using the original pattern data, by a secondary scanning exposure of the target using a weaker intensity and relatively larger diameter exposure beam. The secondary exposure is also carried out at a larger address size (address grid) than is the primary exposure so it is relatively fast in terms of throughput.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: December 18, 2001
    Assignee: Etec Systems, Inc.
    Inventor: Matthew F. Vernon