Abstract: Various embodiments of the present invention relate to systems, devices and methods of oversampling electronic components where high frequency oversampling clock signals are generated internally. The generated oversampling clock is automatically synchronous with the input clock and the input serial data in a serial data link, and is adaptive to predetermined parameters, such as bit depth and oversampling rate.

Abstract: A digital to analog converter (DAC) includes: first and second nodes; a first switching device; a second switching device; and a switch control module. The switch control module selectively configures the first and second switching devices such that: in a first configuration, the first switching device connects a first current to the first node and the second switching device connects a second current to the second node; in a second configuration, the first switching device connects the first current to the second node and the second switching device connects the second current to the first node; and in a third configuration, the first and second switching devices disconnect the first current and the second current from the first and second nodes.

Abstract: Various embodiments of the present invention relate to systems, devices and methods of oversampling electronic components where high frequency oversampling clock signals are generated internally. The generated oversampling clock is automatically synchronous with the input clock and the input serial data in a serial data link, and is adaptive to predetermined parameters, such as bit depth and oversampling rate.

Abstract: Various embodiments of the present invention relate to systems, devices and methods of oversampling electronic components where high frequency oversampling clock signals are generated internally. The generated oversampling clock is automatically synchronous with the input clock and the input serial data in a serial data link, and is adaptive to predetermined parameters, such as bit depth and oversampling rate.

Abstract: Various embodiments of the present invention relate to systems, devices and methods of oversampling electronic components where high frequency oversampling clock signals are generated internally. The generated oversampling clock is automatically synchronous with the input clock and the input serial data in a serial data link, and is adaptive to predetermined parameters, such as bit depth and oversampling rate.

Abstract: A method of charging a battery includes applying a charging current from a semiconductor device to the battery during a first battery charging time period. The method also includes measuring a charging voltage level at the battery during the first battery charging time period. During a non-charging voltage measurement time interval, the method includes temporarily stopping application of the charging current from the semiconductor device to the battery and measuring a non-charging voltage level at the battery while the charging current is not being applied to the battery.

Abstract: A method of charging a battery includes applying a charging current from a semiconductor device to the battery during a first battery charging time period. The method also includes measuring a charging voltage level at the battery during the first battery charging time period. During a non-charging voltage measurement time interval, the method includes temporarily stopping application of the charging current from the semiconductor device to the battery and measuring a non-charging voltage level at the battery while the charging current is not being applied to the battery.

Abstract: A semiconductor device includes an adjustable current source that is coupled to an external battery. The semiconductor device includes a feedback control module that is responsive to a voltage level at the external battery. The feedback control module also has an output that is directed to control the current supplied by the adjustable current source. Also, the feedback control module can selectively provide a signal to periodically and temporarily turn off the current supplied by the adjustable current source. A voltage at the external battery is measured during a time period when the current is turned on and during a time period when the current is turned off. While the current is turned off, the feedback control module can measure the external battery voltage so that it can be compared to the battery voltage while the adjustable current source is on.

Abstract: A system-on-a-chip integrated circuit includes a multimedia module that produces rendered output data and a high-speed interface. A processing module generates output multimedia data in accordance with at least a portion of a multimedia application in response to input multimedia data received from either the multimedia module or the high-speed interface. The output multimedia data is provided to either the multimedia module or the high-speed interface. An on-chip DC-to-DC converter converts a battery voltage into a supply voltage that is coupled to the multimedia module, the high-speed interface, and/or the processing module.

Abstract: A radio record module includes a radio data system (RDS) decoder module that decodes a received RDS signal, that has an associated audio signal, into received RDS data. A memory module stores a record request, the record request having an RDS parameter. A comparison module compares the received RDS data to the RDS parameter of the record request and asserts a record signal when the received RDS data compares favorably to the RDS parameter. A recording module records the associated audio signal in response to the record signal being asserted.

Abstract: A radio record module includes a radio data system (RDS) decoder module, that decodes a received RDS signal, that has an associated audio signal, into received RDS data. A record module produces a digital data file from the digital audio signal in response to a record signal. A catalog generation module generates catalog data associated with the digital audio file, the catalog data including an RDS parameter of the received RDS data. A memory module stores the digital audio file and the catalog data.

Abstract: An amplifying circuit includes an input chopping circuit, an amplifier, and an output chopping circuit. The input chopping circuit is operably coupled to chop an input signal at a chopping rate to produce a chopped input signal. The amplifier has a first input transistor section, a second input transistor section, and a transistor load section. The first and second input transistor sections are operably coupled to receive the chopped input signal, wherein the first input transistor section amplifies the chopped input signal when the chopped input signal is in first signal level range, the second input transistor section amplifies the chopped input signal when the chopped input signal is in a second signal level range, and the first and second input transistor sections amplify the chopped input signal when the chopped input signal is in a third signal level range, wherein the transistor load section is coupled to the first and second input transistors sections to produce an amplified chopped signal.

Abstract: A headphone driver includes a driver module for generating a plurality of headphone driver signals including a filtered stereo sum signal.

Abstract: A method for signal strength detection begins by comparing a signal strength representation of a signal with a signal strength representation of a reference signal. The method continues by adjusting, when the signal strength representation of the signal compares unfavorably with the signal strength representation of the reference signal, at least one of the signal strength representation of the signal and the signal strength representation of the reference signal until the signal strength representation of the signal compares favorably with the signal strength representation of the reference signal. The method continues by determining signal strength of the signal based on the adjusting of the signal strength representation of the signal and signal strength of the reference signal.

Abstract: A touch screen driver includes a conditioner module for conditioning a first input/output port of a touch screen. The conditioner module includes a precharge module for charging the first input/output port to a precharge voltage in response to a precharge signal, and a pull-up module for maintaining the precharge voltage for detecting a touch event.

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract: A level shifter includes a first level shift module for producing a shifted signal by adjusting a direct current (DC) level of an input signal by a first bias voltage having a first polarity. A second level shift module produces an output signal by adjusting a DC level of the shifted signal by a second bias voltage having a second polarity. The first polarity is opposite to the second polarity and the sum of the first bias voltage and the second bias voltage is a non-zero voltage.

Abstract: A radio receiver front-end includes a tunable antenna interface and a low noise amplifying section. The tunable antenna interface is operably coupled to receive a wide bandwidth signal from an antenna, wherein the wide bandwidth signal includes a plurality of channel signals, and wherein the tunable antenna interface is tuned to pass a selected one of the plurality of channel signals substantially unattenuated and to attenuate remaining ones of the plurality of channel signals to produce a filtered wide bandwidth signal. The low noise amplifying section is operably coupled to amplify the filtered wide bandwidth signal to produce a filtered and amplified wide bandwidth signal.

Abstract: A method for reducing distortion caused by clipping of lower frequency audio signals begins by monitoring a volume setting of an audio signal with respect to a range of volume settings to produce a monitored volume setting. The method continues by establishing an equalization setting based on the monitored volume setting.

Abstract: A controlled sampling module samples an input signal from an input device and a reference signal. The controlled sampling module includes a plurality of sample capacitors, a switching network, and a switch control module for controlling the switching network. The switching network couples a first capacitor of the plurality of capacitors to the reference signal during a first phase, and to the input signal during a second phase, such that a charge on the first capacitor remaining at an end of the first phase is cancelled during the second phase.