Patents by Inventor Matthew Feldman

Matthew Feldman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260154210
    Abstract: A method for integrating buffer views into buffer access operations in reconfigurable computing environments. The method includes detecting, in a buffer allocation statement comprising a tensor indexing expression, a buffer view indicator and one or more buffer view parameters. The buffer view parameters are lowered into the tensor indexing expression, according to the buffer view indicator, to produce a modified tensor indexing expression. The buffer view indicator is removed from a buffer allocation statement to produce a modified buffer allocation statement.
    Type: Application
    Filed: November 17, 2025
    Publication date: June 4, 2026
    Applicant: SambaNova Systems, Inc.
    Inventors: Yaqi ZHANG, Matthew FELDMAN
  • Patent number: 12619370
    Abstract: A system and method for memory unit partitioning for reconfigurable dataflow computing systems includes a parser that receives and parses source code for a reconfigurable dataflow processor, a tensor expression extractor that extracts tensor indexing expressions from the source code, a logical memory constraint generator that converts the tensor indexing expressions to logical memory indexing constraints, a grouping module that groups the logical memory indexing constraints into concurrent access groups, and a memory partitioning module that determines a memory unit partitioning solution for each concurrent access group.
    Type: Grant
    Filed: September 17, 2024
    Date of Patent: May 5, 2026
    Assignee: SambaNova Systems, Inc.
    Inventors: Yaqi Zhang, Matthew Feldman
  • Publication number: 20260064599
    Abstract: A system comprises an array of reconfigurable units including a plurality of pattern compute units (PCUs) and a plurality of pattern memory units (PMUs), and a compiler configured to receive a tensor including a plurality of memory access patterns of a first type (read) and a second type (write) located in a logical memory of the compiler. Each memory access pattern includes a memory access particular to that type. The compiler is configured to create a plurality of duplicates of the tensor and assign one or more contexts of any type to the duplicate tensors, such that no two contexts of the same type are in the same duplicate tensor.
    Type: Application
    Filed: November 7, 2025
    Publication date: March 5, 2026
    Applicant: SambaNova Systems, Inc.
    Inventors: Matthew FELDMAN, Yaqi ZHANG
  • Publication number: 20260044924
    Abstract: A statically reconfigurable dataflow architecture processor (SRDAP) performs an N-dimensional affine transform specified by a matrix on an input image to produce an output image includes L address pattern memory units (PMUs) comprising a memory arranged as a vector of L banks, and L corresponding data PMUs. Each data PMU receives a copy of the input image.
    Type: Application
    Filed: October 22, 2025
    Publication date: February 12, 2026
    Applicant: SambaNova Systems, Inc.
    Inventors: Matthew Vilim, Raghu Prabhakar, Matthew Feldman, Yaqi Zhang
  • Patent number: 12475066
    Abstract: A method and system for integrating buffer views into buffer access operations in reconfigurable computing environments. The method includes detecting, in a buffer allocation statement comprising a tensor indexing expression, a buffer view indicator and one or more buffer view parameters. The buffer view parameters are lowered into the tensor indexing expression, according to the buffer view indicator, to produce a modified tensor indexing expression. The buffer view indicator is removed from a buffer allocation statement to produce a modified buffer allocation statement and allocating a buffer according to the modified buffer allocation statement. The system implements the described method and further includes a non-transitory computer readable medium for executing the disclosed method.
    Type: Grant
    Filed: April 1, 2024
    Date of Patent: November 18, 2025
    Assignee: SambaNova Systems, Inc.
    Inventors: Yaqi Zhang, Matthew Feldman
  • Patent number: 12475524
    Abstract: A statically reconfigurable dataflow architecture processor (SRDAP) performs an N-dimensional affine transform specified by a matrix on an input image to produce an output image includes L address pattern memory units (PMUs) comprising a memory arranged as a vector of L banks, and L corresponding data PMUs. Each data PMU receives a copy of the input image. In parallel: each address PMU writes an L-vector of addresses of input pixels to the vector of L banks and reads a single address of the written L-vector of addresses from a predetermined bank corresponding to a PMU number of the address PMU among the L address PMUs, and each data PMU receives the single address from the corresponding address PMU and uses it to read a single input pixel from the data PMU memory. A tree of pattern compute units coalesces the L single input pixels into an L-vector of input pixels.
    Type: Grant
    Filed: January 10, 2023
    Date of Patent: November 18, 2025
    Assignee: SambaNova Systems, Inc.
    Inventors: Matthew Vilim, Raghu Prabhakar, Matthew Feldman, Yaqi Zhang
  • Patent number: 12468635
    Abstract: A system comprises an array of reconfigurable units including a plurality of pattern compute units (PCUs) and a plurality of pattern memory units (PMUs), and a compiler configured to receive a tensor including a plurality of memory access patterns of a first type (read) and a second type (write) located in a logical memory of the compiler. Each memory access pattern includes a memory access particular to that type. The compiler is configured to create a plurality of duplicates of the tensor and assign one or more contexts of any type to the duplicate tensors, such that no two contexts of the same type are in the same duplicate tensor. The compiler is configured to trim the duplicate tensors to retain portions including its corresponding assigned contexts remove portions that are inconsequential to the assigned contexts and dispatch the assigned contexts from each duplicate tensor to one or more PMUs.
    Type: Grant
    Filed: November 29, 2023
    Date of Patent: November 11, 2025
    Assignee: SambaNova Systems, Inc.
    Inventors: Matthew Feldman, Yaqi Zhang
  • Publication number: 20250156372
    Abstract: A method for partitioning executable operations for a reconfigurable computing system includes receiving a set of expressions comprising a plurality of operations and dependencies for those operations, partitioning the plurality of operations into selected executable partitions wherein each selected executable partition conforms to resource constraints for a reconfigurable unit of the reconfigurable computing system. Partitioning the plurality of operations into selected executable partitions may include seeding a candidate partition with an operation, recursively generating an additional candidate partition for each operation adjacent to the candidate partition whose dependent operations are already within the candidate partition or a previously selected partition, and selecting a best candidate partition based on resource cost. A corresponding system and computer-readable medium are also disclosed herein.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 15, 2025
    Applicant: SambaNova Systems, Inc.
    Inventors: Yaqi ZHANG, Mark WAGNER, Matthew FELDMAN, Weiwei CHEN
  • Publication number: 20250053518
    Abstract: A system comprises an array of reconfigurable units including a plurality of pattern compute units (PCUs) and a plurality of pattern memory units (PMUs), and a compiler configured to receive a tensor including a plurality of memory access patterns of a first type (read) and a second type (write) located in a logical memory of the compiler. Each memory access pattern includes a memory access particular to that type. The compiler is configured to create a plurality of duplicates of the tensor and assign one or more contexts of any type to the duplicate tensors, such that no two contexts of the same type are in the same duplicate tensor. The compiler is configured to trim the duplicate tensors to retain portions including its corresponding assigned contexts remove portions that are inconsequential to the assigned contexts and dispatch the assigned contexts from each duplicate tensor to one or more PMUs.
    Type: Application
    Filed: November 29, 2023
    Publication date: February 13, 2025
    Applicant: SambaNova Systems, Inc.
    Inventors: Matthew FELDMAN, Yaqi ZHANG
  • Patent number: 12204489
    Abstract: A method for partitioning executable operations for a reconfigurable computing system includes receiving a set of expressions comprising a plurality of operations and dependencies for those operations, partitioning the plurality of operations into selected executable partitions wherein each selected executable partition conforms to resource constraints for a reconfigurable unit of the reconfigurable computing system. Partitioning the plurality of operations into selected executable partitions may include seeding a candidate partition with an operation, recursively generating an additional candidate partition for each operation adjacent to the candidate partition whose dependent operations are already within the candidate partition or a previously selected partition, and selecting a best candidate partition based on resource cost. A corresponding system and computer-readable medium are also disclosed herein.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: January 21, 2025
    Assignee: SambaNova Systems, Inc.
    Inventors: Yaqi Zhang, Mark Wagner, Matthew Feldman, Weiwei Chen
  • Publication number: 20250013375
    Abstract: A system and method for memory unit partitioning for reconfigurable dataflow computing systems includes a parser that receives and parses source code for a reconfigurable dataflow processor, a tensor expression extractor that extracts tensor indexing expressions from the source code, a logical memory constraint generator that converts the tensor indexing expressions to logical memory indexing constraints, a grouping module that groups the logical memory indexing constraints into concurrent access groups, and a memory partitioning module that determines a memory unit partitioning solution for each concurrent access group.
    Type: Application
    Filed: September 17, 2024
    Publication date: January 9, 2025
    Applicant: SambaNova Systems, Inc.
    Inventors: Yaqi ZHANG, Matthew FELDMAN
  • Patent number: 12093551
    Abstract: A system includes a reconfigurable dataflow processor that comprises an array of compute units and an array of memory units interconnected with a switching fabric. The reconfigurable dataflow processor can be configured to execute a plurality of tensor indexing expressions and access the array of memory units according to a memory unit partitioning solution.
    Type: Grant
    Filed: June 12, 2023
    Date of Patent: September 17, 2024
    Assignee: SambaNova Systems, Inc.
    Inventors: Matthew Feldman, Yaqi Zhang
  • Publication number: 20240241844
    Abstract: A method and system for integrating buffer views into buffer access operations in reconfigurable computing environments. The method includes detecting, in a buffer allocation statement comprising a tensor indexing expression, a buffer view indicator and one or more buffer view parameters. The buffer view parameters are lowered into the tensor indexing expression, according to the buffer view indicator, to produce a modified tensor indexing expression. The buffer view indicator is removed from a buffer allocation statement to produce a modified buffer allocation statement and allocating a buffer according to the modified buffer allocation statement. The system implements the described method and further includes a non-transitory computer readable medium for executing the disclosed method.
    Type: Application
    Filed: April 1, 2024
    Publication date: July 18, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Yaqi ZHANG, Matthew FELDMAN
  • Patent number: 11954053
    Abstract: A method for integrating buffer views into buffer access operations in a reconfigurable computing environment includes detecting, in an instruction stream for a reconfigurable dataflow unit (RDU), a buffer allocation statement comprising a tensor indexing expression, a buffer view indicator and one or more buffer view parameters. The method also includes lowering the buffer view parameters into the indexing expression according to the buffer view indicator to produce a modified tensor indexing expression, removing the buffer view indicator from the buffer allocation statement to produce a modified buffer allocation statement and allocating a buffer according to the modified buffer allocation statement. The modified buffer allocation statement may include the modified tensor indexing expression. A corresponding system and computer readable medium are also disclosed herein.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: April 9, 2024
    Assignee: SambaNova Systems, Inc.
    Inventors: Yaqi Zhang, Matthew Feldman
  • Publication number: 20230350822
    Abstract: A method for integrating buffer views into buffer access operations in a reconfigurable computing environment includes detecting, in an instruction stream for a reconfigurable dataflow unit (RDU), a buffer allocation statement comprising a tensor indexing expression, a buffer view indicator and one or more buffer view parameters. The method also includes lowering the buffer view parameters into the indexing expression according to the buffer view indicator to produce a modified tensor indexing expression, removing the buffer view indicator from the buffer allocation statement to produce a modified buffer allocation statement and allocating a buffer according to the modified buffer allocation statement. The modified buffer allocation statement may include the modified tensor indexing expression. A corresponding system and computer readable medium are also disclosed herein.
    Type: Application
    Filed: October 13, 2022
    Publication date: November 2, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Yaqi ZHANG, Matthew FELDMAN
  • Publication number: 20230315322
    Abstract: A system includes a reconfigurable dataflow processor that comprises an array of compute units and an array of memory units interconnected with a switching fabric. The reconfigurable dataflow processor can be configured to execute a plurality of tensor indexing expressions and access the array of memory units according to a memory unit partitioning solution.
    Type: Application
    Filed: June 12, 2023
    Publication date: October 5, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Matthew FELDMAN, Yaqi ZHANG
  • Publication number: 20230281156
    Abstract: A method for partitioning executable operations for a reconfigurable computing system includes receiving a set of expressions comprising a plurality of operations and dependencies for those operations, partitioning the plurality of operations into selected executable partitions wherein each selected executable partition conforms to resource constraints for a reconfigurable unit of the reconfigurable computing system. Partitioning the plurality of operations into selected executable partitions may include seeding a candidate partition with an operation, recursively generating an additional candidate partition for each operation adjacent to the candidate partition whose dependent operations are already within the candidate partition or a previously selected partition, and selecting a best candidate partition based on resource cost. A corresponding system and computer-readable medium are also disclosed herein.
    Type: Application
    Filed: August 23, 2022
    Publication date: September 7, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Yaqi Zhang, Mark Wagner, Matthew Feldman, Weiwei Chen
  • Patent number: 10713094
    Abstract: An online system maintains a plurality of content items. The online system selects and provides content items to users of the online system in response to impression opportunities to provide content items to users. A plurality of segments of the impression opportunities are determined. Each segment categorizes the impression opportunities. A relationship between a value metric and computing resources used in the selection process are determined for each segment. Each relationship provides a rate of increase of the value metric given an increase in computing resources used. An allocation of computing resources used per impression opportunity for each of segment is determined based on the rates. A plurality of impression opportunities are identified. In response, one or more content items are selected for each impression opportunity using computing resources according to the determined allocation for the segment to which each impression opportunity belongs.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: July 14, 2020
    Assignee: Facebook, Inc.
    Inventors: Matthew Feldman, Li Yu, Wei Yu, Phillip Huang, Haomin Yu, Yufei Chen
  • Patent number: 10373271
    Abstract: An online system applies content policies regulating presentation of sponsored content to its users. For example, content policies may prevent the presentation of sponsored content items in certain positions content feeds. The online system may relax a content policy when generating a content feed for a user based on characteristics of a user. For example, the online system generates a model determining a tolerance of the user for sponsored content, and relaxes one or more content policies if the tolerance of the user for sponsored content equals or exceeds a threshold. As another example, the online system determines whether to relax one or more content policies based on a comparison of a historical amount of compensation received from the user and an expected amount of compensation from presenting content items violating a content policy.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: August 6, 2019
    Assignee: Facebook, Inc.
    Inventors: Matthew Feldman, Jonathan Mooser, Cassidy Jake Beeve-Morris, Halil Bayrak, Aishwarya Rajagopal, Shuo Li, Leqiang Li, Zachary Zhang
  • Publication number: 20180253800
    Abstract: An online system applies content policies regulating presentation of sponsored content to its users. For example, content policies may prevent the presentation of sponsored content items in certain positions content feeds. The online system may relax a content policy when generating a content feed for a user based on characteristics of a user. For example, the online system generates a model determining a tolerance of the user for sponsored content, and relaxes one or more content policies if the tolerance of the user for sponsored content equals or exceeds a threshold. As another example, the online system determines whether to relax one or more content policies based on a comparison of a historical amount of compensation received from the user and an expected amount of compensation from presenting content items violating a content policy.
    Type: Application
    Filed: March 1, 2017
    Publication date: September 6, 2018
    Inventors: Matthew Feldman, Jonathan Mooser, Cassidy Jake Morris, Halil Bayrak, Aishwarya Rajagopal, Shuo Li, Leqiang Li, Zachary Zhang