Patents by Inventor Matthew G. Blain
Matthew G. Blain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11906351Abstract: A photonic integrated circuit and a method for its manufacture are provided. In an embodiment, an intermetal dielectric layer, for example, a silicon oxide layer, is contiguous between an upper metal layer and a lower metal layer on a substrate. One or more waveguides having top and bottom faces are formed in respective waveguide layers within the intermetal dielectric layer between the upper and lower metal layers. There is a distance of at least 600 nm from the upper metal layer to the top face of the uppermost of the several waveguides. There is a distance of at least 600 nm from the lower metal layer to the bottom face of the lowermost of the several waveguides. The waveguides are formed of silicon nitride for longer wavelengths and alumina for shorter wavelengths. These dimensions and materials are favorable for CMOS processing, among other things.Type: GrantFiled: June 22, 2022Date of Patent: February 20, 2024Assignee: National Technology & Engineering Solutions of Sandia, LLCInventors: Michael Gehl, Christopher Todd DeRose, Hayden James McGuinness, Daniel Stick, Randolph R. Kay, Matthew G. Blain
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Publication number: 20220367164Abstract: In an ion trap chip, an RF electrode for producing a radio-frequency ion-trapping electric field is formed in one of a plurality of metallization layers formed on a substrate and separated from each other by intermetal dielectric. At least two spans of the RF electrode are suspended between support pillars over a void defined within one or more layers of intermetal dielectric. For each span that is suspended between a first and a second support pillar, an area ATotal and an area ASupported are defined. ATotal is the total electrode area from an initial edge of the first support pillar to an initial edge of the second support pillar. ASupported is the electrode area directly underlain by the first support pillar. In each span that is suspended from a first support pillar to a second support pillar, ASupported is not more than one-half of ATotal.Type: ApplicationFiled: July 21, 2022Publication date: November 17, 2022Inventors: Matthew G. Blain, Christopher Nordquist, Peter Lukas Wilhelm Maunz
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Patent number: 11150609Abstract: In disclosed apparatus, a plurality of optical waveguides monolithically integrated on a surface ion trap substrate deliver light to the trapping sites. Electrical routing traces defined in one or more metallization levels deliver electrical signals to electrodes of the surface electrode ion trap. A plurality of photodetectors are integrated on the substrate and arranged to detect light from respective trapping sites.Type: GrantFiled: September 24, 2020Date of Patent: October 19, 2021Assignee: National Technology & Engineering Solutions of Sandia, LLCInventors: Lambert Paul Parazzoli, Daniel L. Stick, Christopher T. DeRose, Michael Gehl, Randolph R. Kay, Matthew G. Blain
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Patent number: 11056332Abstract: A radio-frequency (RF) surface ion trap chip includes an RF electrode and an integrated capacitive voltage divider in which an intermediate voltage node is capacitively connected between the RF electrode and a ground. A sensor output trace is connected to the intermediate voltage node.Type: GrantFiled: March 17, 2020Date of Patent: July 6, 2021Assignee: National Technology & Engineering Solutions of Sandia, LLCInventors: Peter Lukas Wilhelm Maunz, Matthew G. Blain, Christopher Nordquist
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Patent number: 10984976Abstract: An ion trap chip, which may be used for quantum information processing and the like, includes an integrated microwave antenna. The antenna is formed as a radiator connected by one of its ends to the center trace of a microwave transmission line and connected by its other end to a current return path through a ground trace of the microwave transmission line. The radiator includes several parallel, coplanar radiator traces connected in series. The radiator traces are connected such that they all carry electric current in the same direction, so that collectively, they simulate a single, unidirectionally flowing sheet of current. In embodiments, induced currents in underlying metallization planes are suppressed by parallel slots that extend in a direction perpendicular to the radiator traces.Type: GrantFiled: August 18, 2020Date of Patent: April 20, 2021Assignee: National Technology & Engineering Solutions of Sandia, LLCInventors: Christopher Nordquist, Matthew G. Blain, Peter Lukas Wilhelm Maunz, Christopher W. Berry
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Patent number: 10418443Abstract: A platform for trapping atomic ions includes a substrate and a plurality of metallization layers that overlie the substrate. The metallization layer farthest from the substrate is a top layer patterned with electrostatic control trap electrodes and radio-frequency trap electrodes. Another metallization layer is a microwave layer patterned to define a microwave circuit. The microwave layer lies below the top layer. The microwave circuit is adapted to generate, in use, a microwave magnetic field above the electrostatic control and radio-frequency trap electrodes. The top metallization layer includes slots that, in use, are penetrated by microwave energy from the microwave circuit.Type: GrantFiled: February 3, 2017Date of Patent: September 17, 2019Assignee: National Technology & Engineering Solutions of Sandia, LLCInventors: Christopher Nordquist, Christopher W. Berry, Peter Lukas Wilhelm Maunz, Matthew G. Blain, Jonathan David Sterk, Paul J. Resnick, John F. Rembetski
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Patent number: 7928375Abstract: An array of microfabricated linear Paul-Straubel ion traps can be used for mass spectrometric applications. Each ion trap comprises two parallel inner RF electrodes and two parallel outer DC control electrodes symmetric about a central trap axis and suspended over an opening in a substrate. Neighboring ion traps in the array can share a common outer DC control electrode. The ions confined transversely by an RF quadrupole electric field potential well on the ion trap axis. The array can trap a wide array of ions.Type: GrantFiled: October 21, 2008Date of Patent: April 19, 2011Assignee: Sandia CorporationInventors: Michael A. Mangan, Matthew G. Blain, Chris P. Tigges, Kevin L. Linker
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Patent number: 7859350Abstract: A microfabricated ion frequency standard (i.e. an ion clock) is disclosed with a permanently-sealed vacuum package containing a source of ytterbium (Yb) ions and an octupole ion trap. The source of Yb ions is a micro-hotplate which generates Yb atoms which are then ionized by a ultraviolet light-emitting diode or a field-emission electron source. The octupole ion trap, which confines the Yb ions, is formed from suspended electrodes on a number of stacked-up substrates. A microwave source excites a ground-state transition frequency of the Yb ions, with a frequency-doubled vertical-external-cavity laser (VECSEL) then exciting the Yb ions up to an excited state to produce fluorescent light which is used to tune the microwave source to the ground-state transition frequency, with the microwave source providing a precise frequency output for the ion clock.Type: GrantFiled: April 28, 2009Date of Patent: December 28, 2010Assignee: Sandia CorporationInventors: Peter Schwindt, Grant Biedermann, Matthew G. Blain, Daniel L. Stick, Darwin K. Serkland, Roy H. Olsson, III
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Patent number: 7154088Abstract: A microfabricated ion trap array, comprising a plurality of ion traps having an inner radius of order one micron, can be fabricated using surface micromachining techniques and materials known to the integrated circuits manufacturing and microelectromechanical systems industries. Micromachining methods enable batch fabrication, reduced manufacturing costs, dimensional and positional precision, and monolithic integration of massive arrays of ion traps with microscale ion generation and detection devices. Massive arraying enables the microscale ion traps to retain the resolution, sensitivity, and mass range advantages necessary for high chemical selectivity. The reduced electrode voltage enables integration of the microfabricated ion trap array with on-chip circuit-based rf operation and detection electronics (i.e., cell phone electronics). Therefore, the full performance advantages of the microfabricated ion trap array can be realized in truly field portable, handheld microanalysis systems.Type: GrantFiled: March 23, 2005Date of Patent: December 26, 2006Assignee: Sandia CorporationInventors: Matthew G. Blain, James G. Fleming
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Patent number: 6870158Abstract: A microscale cylindrical ion trap, having an inner radius of order one micron, can be fabricated using surface micromachining techniques and materials known to the integrated circuits manufacturing and microelectromechanical systems industries. Micromachining methods enable batch fabrication, reduced manufacturing costs, dimensional and positional precision, and monolithic integration of massive arrays of ion traps with microscale ion generation and detection devices. Massive arraying enables the microscale cylindrical ion trap to retain the resolution, sensitivity, and mass range advantages necessary for high chemical selectivity. The microscale CIT has a reduced ion mean free path, allowing operation at higher pressures with less expensive and less bulky vacuum pumping system, and with lower battery power than conventional- and miniature-sized ion traps.Type: GrantFiled: June 5, 2003Date of Patent: March 22, 2005Assignee: Sandia CorporationInventor: Matthew G. Blain