Patents by Inventor Matthew G. Priolo

Matthew G. Priolo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10276483
    Abstract: Embodiments herein may relate to a substrate that includes a coaxial via with a signal portion and a ground shield portion. In embodiments, the via may further include a pad that is coupled with the signal portion. The pad and the ground shield portion may not be coplanar with one another. In embodiments, the substrate may have a plurality of vias that may be formed in a staged and/or skipped manner. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: April 30, 2019
    Inventors: Adrian Rodriguez, Christopher F. Kinney, Matthew G. Priolo, Tianlong Henry Chen
  • Patent number: 10070525
    Abstract: Methods/structures of forming package structures are described. Those methods/structures may include forming a first sub-laminated board comprising a first horseshoe structure that is disposed on a top surface of a first outer ground structure, forming a second sub-laminated board comprising a second horseshoe structure disposed on a second outer ground structure, wherein the second sub-laminated board comprises a stripline trace on a top surface of the second sub-laminated board, and laminating the first sub-laminated board to the second sub-laminated board, wherein the first and second horseshoe structures are in contact with each other during the lamination process.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: September 4, 2018
    Assignee: Intel Corporation
    Inventors: Adrian Rodriguez, Matthew G. Priolo
  • Publication number: 20180226328
    Abstract: Embodiments herein may relate to a substrate that includes a coaxial via with a signal portion and a ground shield portion. In embodiments, the via may further include a pad that is coupled with the signal portion. The pad and the ground shield portion may not be coplanar with one another. In embodiments, the substrate may have a plurality of vias that may be formed in a staged and/or skipped manner. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: August 31, 2015
    Publication date: August 9, 2018
    Inventors: ADRIAN RODRIGUEZ, CHRISTOPHER F. KINNEY, MATTHEW G. PRIOLO, TIANLONG HENRY CHEN
  • Publication number: 20180184522
    Abstract: Methods/structures of forming package structures are described. Those methods/structures may include forming a first sub-laminated board comprising a first horseshoe structure that is disposed on a top surface of a first outer ground structure, forming a second sub-laminated board comprising a second horseshoe structure disposed on a second outer ground structure, wherein the second sub-laminated board comprises a stripline trace on a top surface of the second sub-laminated board, and laminating the first sub-laminated board to the second sub-laminated board, wherein the first and second horseshoe structures are in contact with each other during the lamination process.
    Type: Application
    Filed: December 28, 2016
    Publication date: June 28, 2018
    Applicant: Intel Corporation
    Inventors: Adrian Rodriguez, Matthew G. Priolo