Patents by Inventor Matthew J. Andrus

Matthew J. Andrus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Resistive random access memory device and methods of fabrication
    Patent number: 11489112
    Abstract: An apparatus, includes an interconnect, including a conductive material, above a substrate and a resistive random access memory (RRAM) device coupled to the interconnect. The RRAM device includes an electrode structure above the interconnect, where an upper portion of the electrode structure has a first width. The RRAM device further includes a switching layer on the electrode structure, where the switching layer has the first width and an oxygen exchange layer, having a second width less than the first width, on a portion of the switching layer. The RRAM device further includes a top electrode above the oxygen exchange layer, where the top electrode has the second width and an encapsulation layer on a portion of the switching layer, where the switching layer extends along a sidewall of the oxygen exchange layer.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: November 1, 2022
    Assignee: INTEL CORPORATION
    Inventors: Namrata S. Asuri, Oleg Golonzka, Nathan Strutt, Patrick J. Hentges, Trinh T. Van, Hiten Kothari, Ameya S. Chaudhari, Matthew J. Andrus, Timothy E. Glassman, Dragos Seghete, Christopher J. Wiegand, Daniel G. Ouellette
  • Resistive random access memory device with switching multi-layer stack and methods of fabrication
    Patent number: 11430948
    Abstract: A memory device includes a bottom electrode above a substrate, a first switching layer on the bottom electrode, a second switching layer including aluminum on the first switching layer, an oxygen exchange layer on the second switching layer and a top electrode on the oxygen exchange layer. The presence of the second switching layer including aluminum on the first switching layer enables a reduction in electro-forming voltage of the memory device.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: August 30, 2022
    Assignee: INTEL CORPORATION
    Inventors: Timothy Glassman, Dragos Seghete, Nathan Strutt, Namrata S. Asuri, Oleg Golonzka, Hiten Kothari, Matthew J. Andrus
  • A RESISTIVE RANDOM ACCESS MEMORY DEVICE AND METHODS OF FABRICATION
    Publication number: 20200203602
    Abstract: An apparatus, includes an interconnect, including a conductive material, above a substrate and a resistive random access memory (RRAM) device coupled to the interconnect. The RRAM device includes an electrode structure above the interconnect, where an upper portion of the electrode structure has a first width. The RRAM device further includes a switching layer on the electrode structure, where the switching layer has the first width and an oxygen exchange layer, having a second width less than the first width, on a portion of the switching layer. The RRAM device further includes a top electrode above the oxygen exchange layer, where the top electrode has the second width and an encapsulation layer on a portion of the switching layer, where the switching layer extends along a sidewall of the oxygen exchange layer.
    Type: Application
    Filed: September 28, 2017
    Publication date: June 25, 2020
    Applicant: INTEL CORPORATION
    Inventors: Namrata S. Asuri, Oleg Golonzka, Nathan Strutt, Patrick J. Hentges, Trinh T. Van, Hiten Kothari, Ameya S. Chaudhari, Matthew J. Andrus, Timothy E. Glassman, Dragos Seghete, Christopher J. Wiegand, Daniel G. Ouellette
  • A RESISTIVE RANDOM ACCESS MEMORY DEVICE WITH SWITCHING MULTI-LAYER STACK AND METHODS OF FABRICATION
    Publication number: 20200203603
    Abstract: A memory device includes a bottom electrode above a substrate, a first switching layer on the bottom electrode, a second switching layer including aluminum on the first switching layer, an oxygen exchange layer on the second switching layer and a top electrode on the oxygen exchange layer. The presence of the second switching layer including aluminum on the first switching layer enables a reduction in electro-forming voltage of the memory device.
    Type: Application
    Filed: September 28, 2017
    Publication date: June 25, 2020
    Applicant: INTEL CORPORATION
    Inventors: Timothy Glassman, Dragos Seghete, Nathan Strutt, Namrata S. Asuri, Oleg Golonzka, Hiten Kothari, Matthew J. Andrus