Patents by Inventor Matthew J. DeVoe

Matthew J. DeVoe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8938716
    Abstract: Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: January 20, 2015
    Assignee: National Instruments Corporation
    Inventors: Christopher F. Graf, Ryan H. Brown, Daniel J. Baker, Matthew J. DeVoe, Sarvesh V. Nagarajan
  • Patent number: 8924949
    Abstract: Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: December 30, 2014
    Assignee: National Instruments Corporation
    Inventors: Christopher F. Graf, Ryan H. Brown, Daniel J. Baker, Matthew J. DeVoe
  • Publication number: 20140317599
    Abstract: Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.
    Type: Application
    Filed: July 3, 2014
    Publication date: October 23, 2014
    Inventors: Christopher F. Graf, Ryan H. Brown, Daniel J. Baker, Matthew J. DeVoe, Sarvesh V. Nagarajan
  • Publication number: 20140298289
    Abstract: Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.
    Type: Application
    Filed: June 13, 2014
    Publication date: October 2, 2014
    Inventors: Christopher F. Graf, Ryan H. Brown, Daniel J. Baker, Matthew J. DeVoe
  • Patent number: 8813032
    Abstract: Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: August 19, 2014
    Assignee: National Instruments Corporation
    Inventors: Christopher F. Graf, Ryan H. Brown, Daniel J. Baker, Matthew J. DeVoe, Sarvesh V. Nagarajan
  • Patent number: 8756565
    Abstract: Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: June 17, 2014
    Assignee: National Instruments Corporation
    Inventors: Christopher F. Graf, Ryan H. Brown, Daniel J. Baker, Matthew J. DeVoe
  • Publication number: 20130219356
    Abstract: Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.
    Type: Application
    Filed: June 19, 2012
    Publication date: August 22, 2013
    Inventors: Christopher F. Graf, Ryan H. Brown, Daniel J. Baker, Matthew J. DeVoe
  • Publication number: 20130219360
    Abstract: Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.
    Type: Application
    Filed: June 19, 2012
    Publication date: August 22, 2013
    Inventors: Christopher F. Graf, Ryan H. Brown, Daniel J. Baker, Matthew J. DeVoe, Sarvesh V. Nagarajan