Patents by Inventor Matthew J. Farinelli

Matthew J. Farinelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8832936
    Abstract: Techniques for forming enhanced electrical connections are provided. In one aspect, a method of forming an electrical connecting device includes the steps of: depositing an elastomeric material on an electrically insulating carrier; and metallizing the elastomeric material so as to form an electrically conductive layer running continuously through a plane of the carrier and along a surface of the elastomeric material.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: September 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: Gareth Geoffrey Hougham, Ali Afzali, Steven Allen Cordes, Paul W. Coteus, Matthew J. Farinelli, Sherif A. Goma, Alphonso P. Lanzetta, Daniel Peter Morris, Joanna Rosner, Nisha Yohannan
  • Patent number: 8745850
    Abstract: An apparatus and method for manufacturing a superconducting low-pass filter for quantum computing devices. The apparatus includes a plurality of containers and input and output ports connected to opposite ends of the apparatus. A plurality of coils of superconducting wire are wound using a mandrel. An adhesive is applied to the coils for maintaining a wound state. Each of the coils are positioned in each of the containers and electrically connected to each other with at least one coil being connected to the input port and at least one coil being connected to the output port. The coils are released or expanded from their wound state using an adhesive solvent. The containers are then filled with a conductive polymer and the containers are closed with one or more covers.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: June 10, 2014
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Farinelli, George A. Keefe, Frank Milliken, Jr., James R. Rozen
  • Patent number: 8551816
    Abstract: The present invention allows for direct chip-to-chip connections using the shortest possible signal path.
    Type: Grant
    Filed: April 4, 2012
    Date of Patent: October 8, 2013
    Assignee: International Business Machines Corporation
    Inventors: Steven A. Cordes, Matthew J. Farinelli, Sherif A. Goma, Peter A. Gruber, John U. Knickerbocker, James L. Speidell
  • Patent number: 8524596
    Abstract: Techniques for bond pad fabrication are provided. In one aspect, a method of forming a bond pad comprises the following steps. At least one alloying element is selectively introduced to at least a portion of at least one surface of the bond pad. The at least one alloying element is diffused into at least a portion of the bond pad through one or more thermal cycles. The at least one alloying element may be selectively introduced to the bond pad by depositing an alloying element layer comprising the at least one alloying element onto the bond pad and patterning and etching at least a portion of the layer.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: September 3, 2013
    Assignee: International Business Machines Corporation
    Inventors: Frederic Beaulieu, Gobinda Das, Steven J. Duda, Matthew J. Farinelli, Adreanne Kelly, Samuel McKnight, William J. Murphy
  • Publication number: 20120279767
    Abstract: Techniques for bond pad fabrication are provided. In one aspect, a method of forming a bond pad comprises the following steps. At least one alloying element is selectively introduced to at least a portion of at least one surface of the bond pad. The at least one alloying element is diffused into at least a portion of the bond pad through one or more thermal cycles. The at least one alloying element may be selectively introduced to the bond pad by depositing an alloying element layer comprising the at least one alloying element onto the bond pad and patterning and etching at least a portion of the layer.
    Type: Application
    Filed: July 16, 2012
    Publication date: November 8, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Frederic Beaulieu, Gobinda Das, Steven J. Duda, Matthew J. Farinelli, Adreanne Kelly, Samuel McKnight, William J. Murphy
  • Patent number: 8294138
    Abstract: A method for determining whether a quantum system comprising a superconducting qubit is occupying a first basis state or a second basis state once a measurement is performed is provided. The method, comprising: applying a signal having a frequency through a transmission line coupled to the superconducting qubit characterized by two distinct, separate, and stable states of differing resonance frequencies each corresponding to the occupation of the first or second basis state prior to measurement; and measuring at least one of an output power or phase at an output port of the transmission line, wherein the measured output power or phase is indicative of whether the superconducting qubit is occupying the first basis state or the second basis state.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: October 23, 2012
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Farinelli, George A. Keefe, Shwetank Kumar, Matthias Steffen
  • Patent number: 8237271
    Abstract: The present invention allows for direct chip-to-chip connections using the shortest possible signal path.
    Type: Grant
    Filed: June 19, 2007
    Date of Patent: August 7, 2012
    Assignee: International Business Machines Corporation
    Inventors: Steven A. Cordes, Matthew J. Farinelli, Sherif A. Goma, Peter A. Gruber, John U. Knickerbocker, James L. Speidell
  • Publication number: 20120187577
    Abstract: The present invention allows for direct chip-to-chip connections using the shortest possible signal path.
    Type: Application
    Filed: April 4, 2012
    Publication date: July 26, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven A. Cordes, Matthew J. Farinelli, Sherif A. Goma, Peter A. Gruber, John U. Knickerbocker, James L. Speidell
  • Patent number: 8187923
    Abstract: A laser release and glass chip removal process for a integrated circuit module avoiding carrier edge cracking is provided.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: May 29, 2012
    Assignee: International Business Machines Corporation
    Inventors: Paul Stephen Andry, Leena Paivikki Buchwalter, Matthew J. Farinelli, Sherif A. Goma, Raymond R. Horton, Edmund J. Sprogis
  • Publication number: 20120091585
    Abstract: A laser release and glass chip removal process for a integrated circuit module avoiding carrier edge cracking is provided.
    Type: Application
    Filed: December 6, 2011
    Publication date: April 19, 2012
    Applicant: International Business Machines Corporation
    Inventors: Leena P. Buchwalter, Paul S. Andry, Matthew J. Farinelli, Sherif A. Goma, Raymond R. Horton, Edmund J. Sprogis
  • Patent number: 8159248
    Abstract: Flexible and rigid interposers for use in the semiconductor industry and methods for manufacturing the same are described. Auto-catalytic processes are used to minimize the costs associated with the production of flexible interposers, while increasing the yield and lifetime. Electrical contact regions are easily isolated and the risk of corrosion is reduced because all portions of the interposer are plated at once. Leads projecting from the flexible portion of the interposers accommodate a greater variety of components to be tested. Rigid interposers include a pin projecting from a probe pad affixed to a substrate. The rigidity of the pin penetrates oxides on a contact pad to be tested. Readily available semiconductor materials and processes are used to manufacture the flexible and rigid interposers according to the invention. The flexible and rigid interposers can accommodate pitches down to 25 ?m.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: April 17, 2012
    Assignee: International Business Machines Corporation
    Inventors: Steven A. Cordes, Matthew J. Farinelli, Sherif A. Goma
  • Patent number: 8081280
    Abstract: In a liquid crystal display device, a method for creating desirable pretilt angle by means of topography of the substrates, such as a surface that is sloped with respect to the surface of the electrodes. In combination with a low pretilt but highly photo-stable alignment layer, which may be very resistant to high levels of ultraviolet radiation, a high pretilt and photo-stable alignment structure is generated, by essentially combining two incompatible technical approaches. The ever more stringent requirements for projection displays are met. The methods for producing such sloped surfaces and the considerations related to design of the sloped surfaces are disclosed.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: December 20, 2011
    Assignee: International Business Machines Corporation
    Inventors: George Liang-Tai Chiu, Steven Alan Cordes, James Patrick Doyle, Matthew J. Farinelli, Minhua Lu, Hiroki Nakano, Ronald Nunes, James Vichiconti
  • Patent number: 8054095
    Abstract: A probe structure for an electronic device is provided. In one aspect, the probe structure includes an electrically insulating carrier having one or more contact structures traversing a plane thereof. Each contact structure includes an elastomeric material having an electrically conductive layer running along at least one surface thereof continuously through the plane of the carrier. The probe structure includes one or more other contact structures adapted for connection to a test apparatus.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Gareth Geoffrey Hougham, Ali Afzali, Steven Allen Cordes, Paul W. Coteus, Matthew J. Farinelli, Sherif A. Goma, Alphonso P. Lanzetta, Daniel Peter Morris, Joanna Rosner, Nisha Yohannan
  • Publication number: 20110175062
    Abstract: A method for determining whether a quantum system comprising a superconducting qubit is occupying a first basis state or a second basis state once a measurement is performed is provided. The method, comprising: applying a signal having a frequency through a transmission line coupled to the superconducting qubit characterized by two distinct, separate, and stable states of differing resonance frequencies each corresponding to the occupation of the first or second basis state prior to measurement; and measuring at least one of an output power or phase at an output port of the transmission line, wherein the measured output power or phase is indicative of whether the superconducting qubit is occupying the first basis state or the second basis state.
    Type: Application
    Filed: February 14, 2011
    Publication date: July 21, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew J. Farinelli, George A. Keefe, Shwetank Kumar, Matthias Steffen
  • Patent number: 7932514
    Abstract: A method for determining whether a quantum system comprising a superconducting qubit is occupying a first basis state or a second basis state once a measurement is performed is provided. The method, comprising: applying a signal having a frequency through a transmission line coupled to the superconducting qubit characterized by two distinct, separate, and stable states of differing resonance frequencies each corresponding to the occupation of the first or second basis state prior to measurement; and measuring at least one of an output power or phase at an output port of the transmission line, wherein the measured output power or phase is indicative of whether the superconducting qubit is occupying the first basis state or the second basis state.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: April 26, 2011
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Farinelli, George A. Keefe, Shwetank Kumar, Matthias Steffen
  • Patent number: 7771208
    Abstract: Techniques for forming enhanced electrical connections are provided. In one aspect, an electrical connecting device comprises an electrically insulating carrier having one or more contact structures traversing a plane thereof. Each contact structure comprises an elastomeric material having an electrically conductive layer running along at least one surface thereof continuously through the plane of the carrier.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: August 10, 2010
    Assignee: International Business Machines Corporation
    Inventors: Gareth Geoffrey Hougham, Ali Afzali, Steven Allen Cordes, Paul W. Coteus, Matthew J. Farinelli, Sherif A. Goma, Alphonso P. Lanzetta, Daniel Peter Morris, Joanna Rosner, Nisha Yohannan
  • Patent number: 7688095
    Abstract: Flexible and rigid interposers for use in the semiconductor industry and methods for manufacturing the same are described. Auto-catalytic processes are used to minimize the costs associated with the production of flexible interposers, while increasing the yield and lifetime. Electrical contact regions are easily isolated and the risk of corrosion is reduced because all portions of the interposer are plated at once. Leads projecting from the flexible portion of the interposers accommodate a greater variety of components to be tested. Rigid interposers include a pin projecting from a probe pad affixed to a substrate. The rigidity of the pin penetrates oxides on a contact pad to be tested. Readily available semiconductor materials and processes are used to manufacture the flexible and rigid interposers according to the invention. The flexible and rigid interposers can accommodate pitches down to 25 ?m.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: March 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Steven A. Cordes, Matthew J. Farinelli, Sherif A. Goma
  • Publication number: 20100038126
    Abstract: Flexible and rigid interposers for use in the semiconductor industry and methods for manufacturing the same are described. Auto-catalytic processes are used to minimize the costs associated with the production of flexible interposers, while increasing the yield and lifetime. Electrical contact regions are easily isolated and the risk of corrosion is reduced because all portions of the interposer are plated at once. Leads projecting from the flexible portion of the interposers accommodate a greater variety of components to be tested. Rigid interposers include a pin projecting from a probe pad affixed to a substrate. The rigidity of the pin penetrates oxides on a contact pad to be tested. Readily available semiconductor materials and processes are used to manufacture the flexible and rigid interposers according to the invention. The flexible and rigid interposers can accommodate pitches down to 25 ?m.
    Type: Application
    Filed: August 18, 2009
    Publication date: February 18, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven A. Cordes, Matthew J. Farinelli, Sherif A. Goma
  • Publication number: 20090311849
    Abstract: Improved methods of separating integrated circuit chips fabricated on a single wafer are provided. In an embodiment, a method of separating integrated circuit chips fabricated on a wafer comprises: attaching a support to a back surface of the wafer; dicing the wafer to form individual integrated circuit chips attached to the support; attaching a carrier comprising a releasable adhesive material to a front surface of the wafer opposite from the back surface; separating the support from the back surface of the wafer; subjecting the carrier to an effective amount of heat, radiation, or both to reduce the adhesiveness of the adhesive material to allow for removal of at least one of the integrated circuit chips from the carrier; and picking up and moving at least one of the integrated circuit chips using a tool configured to handle the integrated circuit chips.
    Type: Application
    Filed: June 17, 2008
    Publication date: December 17, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul S. Andry, Bing Dang, Matthew J. Farinelli, Cornelia K. Tsang
  • Publication number: 20090300914
    Abstract: Techniques for forming enhanced electrical connections are provided. In one aspect, a method of forming an electrical connecting device includes the steps of: depositing an elastomeric material on an electrically insulating carrier; and metallizing the elastomeric material so as to form an electrically conductive layer running continuously through a plane of the carrier and along a surface of the elastomeric material.
    Type: Application
    Filed: July 31, 2009
    Publication date: December 10, 2009
    Applicant: International Business Machines Corporation
    Inventors: Gareth Geoffrey Hougham, Ali Afzali, Steven Allen Cordes, Paul W. Coteus, Matthew J. Farinelli, Sherif A. Goma, Alphonso P. Lanzetta, Daniel Peter Morris, Joanna Rosner, Nisha Yohannan