Patents by Inventor Matthew J. Koebert

Matthew J. Koebert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230354512
    Abstract: A circuit board with integrated fusing includes an insulating substrate having a circuit trace formed on a surface thereof, the circuit trace including a first circuit trace portion and a second circuit trace portion. A fusible link electrically connects the first circuit trace portion to the second circuit trace portion, the fusible link including a planar surface extending from the first circuit trace portion to the second circuit trace portion. A dielectric reflow encapsulates the fusible link on the planar surface from the first circuit trace portion to the second circuit trace portion.
    Type: Application
    Filed: July 7, 2023
    Publication date: November 2, 2023
    Inventors: Kaijam M. Woodley, Michael K. Balck, Matthew J. Koebert
  • Patent number: 11729906
    Abstract: A circuit board with integrated fusing includes an insulating substrate having a circuit trace formed on a surface thereof, the circuit trace including a first circuit trace portion and a second circuit trace portion. A fusible link electrically connects the first circuit trace portion to the second circuit trace portion, the fusible link including a planar surface extending from the first circuit trace portion to the second circuit trace portion. A dielectric reflow encapsulates the fusible link on the planar surface from the first circuit trace portion to the second circuit trace portion.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: August 15, 2023
    Assignee: Eaton Intelligent Power Limited
    Inventors: Kaijam M. Woodley, Michael K. Balck, Matthew J. Koebert
  • Publication number: 20200196442
    Abstract: A circuit board with integrated fusing includes an insulating substrate having a circuit trace formed on a surface thereof, the circuit trace including a first circuit trace portion and a second circuit trace portion. A fusible link electrically connects the first circuit trace portion to the second circuit trace portion, the fusible link including a planar surface extending from the first circuit trace portion to the second circuit trace portion. A dielectric reflow encapsulates the fusible link on the planar surface from the first circuit trace portion to the second circuit trace portion.
    Type: Application
    Filed: December 4, 2019
    Publication date: June 18, 2020
    Inventors: Kaijam M. Woodley, Michael K. Balck, Matthew J. Koebert