Patents by Inventor Matthew J. Reagor

Matthew J. Reagor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250045618
    Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.
    Type: Application
    Filed: March 20, 2024
    Publication date: February 6, 2025
    Applicant: Rigetti & Co, LLC
    Inventors: Benjamin Jacob BLOOM, Shane Arthur CALDWELL, Michael James CURTIS, Matthew J. REAGOR, Chad Tyler RIGETTI, Eyob A. SETE, William J. ZENG, Peter Jonathan KARALEKAS, Nikolas Anton TEZAK, Nasser ALIDOUST
  • Patent number: 12204997
    Abstract: In a general aspect, a photonic quantum network is disclosed. In some implementations, microwave modes and optical modes are generated on first and second quantum processing units (QPUs) by operation of a first transducer device of the first QPU and a second transducer device of the second QPU. The microwave modes are transmitted within the first and second QPUs from the first and second transducer devices to respective first and second qubit devices. The optical modes are transmitted from the first and second QPUs to an interferometer device. By operation of the interferometer device, output signals are generated on respective output channels based on the optical modes from the first and second QPUs. Based on the output signals detected by operation of photodetector devices coupled to the respective output channels, quantum entanglement transferred to the first and second qubit devices by the microwave modes is identified.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: January 21, 2025
    Assignees: Rigetti & Co, LLC, President and Fellows of Harvard College
    Inventors: Matthew J. Reagor, Jeffrey Cole Holzgrafe, Marko LonĨar
  • Publication number: 20240394585
    Abstract: In a general aspect, a method of modifying a quantum error correction code for logical qubits is described. In some implementations, a method includes, by operation of classical computing systems, determining target values of logical errors associated with applying operations on logical qubits; by operation of the quantum computing system, measuring observed values of the logical errors associated with applying the operations on the logical qubits; and by operation of the classical computing systems, updating the quantum error correction code based on the target values and the observed values of the logical errors. Updating the quantum error correction code includes modifying a quantum error correction pattern for one or more of the logical qubits. The method further includes, by operation of the quantum computing system, applying the quantum error correction code using the modified quantum error correction pattern while executing a quantum computing routine.
    Type: Application
    Filed: July 3, 2024
    Publication date: November 28, 2024
    Applicant: Rigetti & Co, LLC
    Inventor: Matthew J. Reagor
  • Publication number: 20240364345
    Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.
    Type: Application
    Filed: April 16, 2024
    Publication date: October 31, 2024
    Applicant: Rigetti & Co, LLC
    Inventors: Eyob A. Sete, Nicolas Didier, Marcus Palmer da Silva, Chad Tyler Rigetti, Matthew J. Reagor, Shane Arthur Caldwell, Nikolas Anton Tezak, Colm Andrew Ryan, Sabrina Sae Byul Hong, Prasahnt Sivarajah, Alexander Papageorge, Deanna Margo Abrams
  • Publication number: 20240311676
    Abstract: In a general aspect, parametric dissipation operations are performed in a quantum computing system. In some implementations, a method includes executing a computer program in a computer system. Executing the computer program includes applying a quantum logic gate associated with a unitary operation to qubits defined by qubit devices on a quantum processing unit; obtaining an estimated value of a dissipation rate parameter; applying a parametric dissipation operation to one or more of the qubit devices; and measuring a state of one or more of the qubit devices. The parametric dissipation operation has a programmable dissipation rate that is controlled by the estimated value of the dissipation rate parameter; and the parametric dissipation operation is applied separately from the quantum logic gate.
    Type: Application
    Filed: April 12, 2024
    Publication date: September 19, 2024
    Applicant: Rigetti & Co, LLC
    Inventor: Matthew J. Reagor
  • Patent number: 12033032
    Abstract: In a general aspect, a quantum processor has a modular architecture. In some aspects, a modular quantum processor includes first and second quantum processor chips and a cap structure. The first quantum processor chip is supported on a substrate layer and includes a first plurality of qubit devices. The second quantum processor chip is supported on the substrate layer and includes a second plurality of qubit devices. The cap structure is supported on the first and second quantum processor chips and includes a coupler device that provides coupling between at least one of the first plurality of qubit devices with at least one of the second plurality of qubit devices. In some instances, the coupler device is an active coupler device that is configured to selectively couple at least one of the first plurality of qubit devices with at least one of the second plurality of qubit devices.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: July 9, 2024
    Assignee: Rigetti & Co, LLC
    Inventors: Michael Justin Gerchick Scheer, Maxwell Benjamin Block, Benjamin Jacob Bloom, Matthew J. Reagor, Alexander Papageorge, Kamal Yadav, Nasser Alidoust, Colm Andrew Ryan, Shane Arthur Caldwell, Yuvraj Mohan, Anthony Polloreno, John Morrison Macaulay, Blake Robert Johnson
  • Patent number: 11990905
    Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.
    Type: Grant
    Filed: April 26, 2023
    Date of Patent: May 21, 2024
    Assignee: Rigetti & Co, LLC
    Inventors: Eyob A. Sete, Nicolas Didier, Marcus Palmer da Silva, Chad Tyler Rigetti, Matthew J. Reagor, Shane Arthur Caldwell, Nikolas Anton Tezak, Colm Andrew Ryan, Sabrina Sae Byul Hong, Prasahnt Sivarajah, Alexander Papageorge, Deanna Margo Abrams
  • Patent number: 11977956
    Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: May 7, 2024
    Assignee: Rigetti & Co, LLC
    Inventors: Benjamin Jacob Bloom, Shane Arthur Caldwell, Michael James Curtis, Matthew J. Reagor, Chad Tyler Rigetti, Eyob A. Sete, William J. Zeng, Peter Jonathan Karalekas, Nikolas Anton Tezak, Nasser Alidoust
  • Publication number: 20240146307
    Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.
    Type: Application
    Filed: April 26, 2023
    Publication date: May 2, 2024
    Applicant: Rigetti & Co, LLC
    Inventors: Eyob A. Sete, Nicolas Didier, Marcus Palmer da Silva, Chad Tyler Rigetti, Matthew J. Reagor, Shane Arthur Caldwell, Nikolas Anton Tezak, Colm Andrew Ryan, Sabrina Sae Byul Hong, Prasahnt Sivarajah, Alexander Papageorge, Deanna Margo Abrams
  • Patent number: 11954562
    Abstract: In a general aspect, a quantum computing method is described. In some aspects, a control system in a quantum computing system assigns subsets of qubit devices in a quantum processor to respective cores. The control system identifies boundary qubit devices residing between the cores in the quantum processor and generates control sequences for each respective core. A signal delivery system in communication with the control system and the quantum processor receives control signals to execute the control sequences, and the control signals are applied to the respective cores in the quantum processor.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: April 9, 2024
    Assignee: Rigetti & Co, LLC
    Inventors: Matthew J. Reagor, William J. Zeng, Michael Justin Gerchick Scheer, Benjamin Jacob Bloom, Nikolas Anton Tezak, Nicolas Didier, Christopher Butler Osborn, Chad Tyler Rigetti
  • Publication number: 20240112060
    Abstract: In a general aspect, a surface code syndrome measurement is performed on a superconducting quantum processing unit. In some implementations, the superconducting quantum processing unit is caused to apply a quantum error correction code including X-type and Z-type stabilizer check patches. Each of the X-type and Z-type stabilizer check patches includes a stabilizer check qubit device and data qubit devices of the superconducting quantum processing unit. Applying the quantum error correction code includes iteratively twirling the data qubit devices in a stabilizer check patch; and evolving the stabilizer check qubit device in the stabilizer check patch and the data qubit devices in the stabilizer check patch under an interaction Hamiltonian. The interaction Hamiltonian includes a plurality of terms interactions between the stabilizer check qubit device in the stabilizer check patch and a respective one of the data qubit devices in the stabilizer check patch.
    Type: Application
    Filed: September 11, 2023
    Publication date: April 4, 2024
    Applicants: Rigetti & Co, LLC, Goldman Sachs & Co. LLC
    Inventors: Matthew J. Reagor, Thomas C. Bohdanowicz, David Rodriguez Perez, Eyob A. Sete, William J. Zeng
  • Patent number: 11875222
    Abstract: In a general aspect, a method executed in a quantum computing system includes performing a calibration process in the quantum computing system to identify a value of a parameter of the quantum computing system. The method also includes analyzing a variation of the value in response to a change in a condition of the quantum computing system, thereby determining a stability of the parameter. The method additionally includes scheduling a recalibration of the parameter based on the stability of the parameter and executing a quantum algorithm in the quantum computing system based on the value of the parameter identified by the calibration process.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: January 16, 2024
    Assignee: Rigetti & Co, LLC
    Inventors: Matthew J. Reagor, Christopher Butler Osborn, Alexa Nitzan Staley, Sabrina Sae Byul Hong, Benjamin Jacob Bloom, Alexander Papageorge, Nasser Alidoust
  • Publication number: 20230394342
    Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.
    Type: Application
    Filed: January 18, 2023
    Publication date: December 7, 2023
    Applicant: Rigetti & Co, LLC
    Inventors: Benjamin Jacob Bloom, Shane Arthur Caldwell, Michael James Curtis, Matthew J. Reagor, Chad Tyler Rigetti, Eyob A. Sete, William J. Zeng, Peter Jonathan Karalekas, Nikolas Anton Tezak, Nasser Alidoust
  • Patent number: 11740984
    Abstract: In a general aspect, quantum computing system performance is tested. Systems and methods for testing hardware in a quantum computing system are described. The methods may include certification/decertification of data produced by the quantum computing system, detection of faults, correction of errors and/or recalibration/replacement of the quantum computing system or a quantum computing subsystem.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: August 29, 2023
    Assignee: Rigetti & Co, LLC
    Inventors: Nikolas Anton Tezak, Matthew J. Reagor, Christopher Butler Osborn, Alexa Nitzan Staley
  • Patent number: 11677402
    Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: June 13, 2023
    Assignee: Rigetti & Co, LLC
    Inventors: Eyob A. Sete, Nicolas Didier, Marcus Palmer da Silva, Chad Tyler Rigetti, Matthew J. Reagor, Shane Arthur Caldwell, Nikolas Anton Tezak, Colm Andrew Ryan, Sabrina Sae Byul Hong, Prasahnt Sivarajah, Alexander Papageorge, Deanna Margo Abrams
  • Patent number: 11593698
    Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: February 28, 2023
    Assignee: Rigetti & Co, LLC
    Inventors: Benjamin Jacob Bloom, Shane Arthur Caldwell, Michael James Curtis, Matthew J. Reagor, Chad Tyler Rigetti, Eyob A. Sete, William J. Zeng, Peter Jonathan Karalekas, Nikolas Anton Tezak, Nasser Alidoust
  • Patent number: 11574230
    Abstract: A quantum computing system that includes a quantum circuit device having at least one operating frequency; a first substrate having a first surface on which the quantum circuit device is disposed; a second substrate having a first surface that defines a recess of the second substrate, the first and second substrates being arranged such that the recess of the second substrate forms an enclosure that houses the quantum circuit device; and an electrically conducting layer that covers at least a portion of the recess of the second substrate.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: February 7, 2023
    Assignee: Rigetti & Co, LLC
    Inventors: Chad Tyler Rigetti, Dane Christoffer Thompson, Alexei N. Marchenkov, Mehrnoosh Vahidpour, Eyob A. Sete, Matthew J. Reagor
  • Patent number: 11521103
    Abstract: In a general aspect, a plurality of distinct quantum processor unit (QPU) instances are utilized to execute a quantum computation. Hybrid classical-quantum computing methods and systems are described which utilize the plurality of QPU instances in the execution of quantum computations.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: December 6, 2022
    Assignee: Rigetti & Co, LLC
    Inventors: Matthew J. Reagor, Blake Robert Johnson, Marcus Palmer da Silva, Johannes Sebastian Otterbach, Nikolas Anton Tezak, Chad Tyler Rigetti
  • Publication number: 20220366288
    Abstract: In a general aspect, a quantum computing method is described. In some aspects, a control system in a quantum computing system assigns subsets of qubit devices in a quantum processor to respective cores. The control system identifies boundary qubit devices residing between the cores in the quantum processor and generates control sequences for each respective core. A signal delivery system in communication with the control system and the quantum processor receives control signals to execute the control sequences, and the control signals are applied to the respective cores in the quantum processor.
    Type: Application
    Filed: December 13, 2021
    Publication date: November 17, 2022
    Applicant: Rigetti & Co, LLC
    Inventors: Matthew J. Reagor, William J. Zeng, Michael Justin Gerchick Scheer, Benjamin Jacob Bloom, Nikolas Anton Tezak, Nicolas Didier, Christopher Butler Osborn, Chad Tyler Rigetti
  • Publication number: 20220245497
    Abstract: In a general aspect, a computing system is configured to execute a quantum approximate optimization algorithm. In some aspects, a control system identifies a pair of qubit devices in a quantum processor. The quantum processor includes a connection that provides coupling between the pair of qubit devices. ZZ coupling between the pair of qubit devices is activated to execute a cost function defined in the quantum approximate optimization algorithm. The cost function is associated with a maximum cut problem, and the ZZ coupling is activated by allowing the pair of qubits to evolve under a natural Hamiltonian for a time period ?. One or more of the pair of qubit devices is measured to obtain an output from an execution of the quantum approximate optimization algorithm.
    Type: Application
    Filed: September 13, 2021
    Publication date: August 4, 2022
    Applicant: Rigetti & Co, LLC
    Inventors: William J. Zeng, Nicholas C. Rubin, Matthew J. Reagor, Michael Justin Gerchick Scheer