Patents by Inventor Matthew J. Sendelbach

Matthew J. Sendelbach has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170018069
    Abstract: A computerized system and method are provided for use in measuring at least one parameter of interest of a structure. The system comprises a server utility configured for data communication with at least first and second data provider utilities. The server utility receives, from the server provider utilities, measured data comprising first and second measured data pieces of different types indicative of parameters of the same structure; and is capable of processing the first and second measured data pieces for optimizing one or more first parameters values of the structure in one of the first and second measured data pieces by utilizing one or more second parameters values of the structure of the other of said first and second measured data pieces.
    Type: Application
    Filed: October 30, 2014
    Publication date: January 19, 2017
    Inventors: Alok Vaid, Cornel Bozdong, Shay Wolfling, Matthew J. Sendelbach, Jamie Tsai, Cermen Osorio
  • Patent number: 9330985
    Abstract: Methods and systems are provided for fabricating and measuring features of a semiconductor device structure. An exemplary method of fabricating a semiconductor device structure involves fabricating a feature of the semiconductor device structure on a wafer of semiconductor material, determining a hybrid recipe for measuring the feature, configuring a plurality of metrology tools to implement the hybrid recipe, and obtaining a hybrid measurement of the feature in accordance with the hybrid recipe.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: May 3, 2016
    Assignees: GLOBALFOUNDRIES, INC., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alok Vaid, Ned R. Saleh, Matthew J. Sendelbach, Narender N. Rana
  • Publication number: 20130245806
    Abstract: Methods and systems are provided for fabricating and measuring features of a semiconductor device structure. An exemplary method of fabricating a semiconductor device structure involves fabricating a feature of the semiconductor device structure on a wafer of semiconductor material, determining a hybrid recipe for measuring the feature, configuring a plurality of metrology tools to implement the hybrid recipe; and obtaining a hybrid measurement of the feature in accordance with the hybrid recipe.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 19, 2013
    Applicants: International Business Machines Corporation, GLOBALFOUNDRIES INC.
    Inventors: Alok Vaid, Ned R. Saleh, Matthew J. Sendelbach, Narender N. Rana
  • Publication number: 20130203188
    Abstract: Methods and systems are provided for fabricating and measuring physical features of a semiconductor device structure. An exemplary method of fabricating a semiconductor device structure involves forming a first feature of the semiconductor device structure on a substrate of semiconductor material, obtaining a first measurement for the semiconductor device structure from a first metrology tool, obtaining a second measurement of the first feature of the semiconductor device structure from a second metrology tool, and determining a hybrid measurement for the first feature based at least in part on the first measurement and the second measurement.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 8, 2013
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Alok Vaid, Ned R. Saleh, Matthew J. Sendelbach, Narender Rana
  • Patent number: 8157978
    Abstract: Disclosed is an electrochemical etching system with localized etching capability. The system allows multiple different porous semiconductor regions to be formed on a single semiconductor wafer. Localized etching is achieved through the use of one or more stationary and/or movable computer-controlled inner containers operating within an outer container. The outer container holds the electrolyte solution and acts as an electrolyte supply source for the inner container(s). The inner container(s) limit the size of the etched region of the semiconductor wafer by confining the electric field. Additionally, the current amount passing through each inner container during the electrochemical etching process can be selectively adjusted to achieve a desired result within the etched region. Localized etching of sub-regions within each etched region can also be achieved through the use of different stationary and/or moveable electrode structures and shields within each inner container.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: April 17, 2012
    Assignees: International Business Machines Corporation, Advanced Micro Devices, GlobalFoundries Inc.
    Inventors: Matthew J. Sendelbach, Alok Vaid, Shahin Zangooie
  • Patent number: 7791723
    Abstract: Optical measurement method and systems employing a fixed polarizer are disclosed. In one embodiment, the method includes providing at least one optical detection system having a fixed polarizer having a first type polarization; providing a first target on a substrate and a second target on the substrate; optically measuring the first target and the second target using the at least one optical detection system with the first target being positioned at a right angle relative to the second target to obtain a first measurement with the first type polarization and a second measurement with a second type-equivalent polarization; and combining the first measurement and the second measurement to obtain the optical measurement.
    Type: Grant
    Filed: January 21, 2008
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventors: Charles N. Archie, Matthew J. Sendelbach, Shahin Zangooie
  • Publication number: 20100187126
    Abstract: Disclosed is an electrochemical etching system with localized etching capability. The system allows multiple different porous semiconductor regions to be formed on a single semiconductor wafer. Localized etching is achieved through the use of one or more stationary and/or movable computer-controlled inner containers operating within an outer container. The outer container holds the electrolyte solution and acts as an electrolyte supply source for the inner container(s). The inner container(s) limit the size of the etched region of the semiconductor wafer by confining the electric field. Additionally, the current amount passing through each inner container during the electrochemical etching process can be selectively adjusted to achieve a desired result within the etched region. Localized etching of sub-regions within each etched region can also be achieved through the use of different stationary and/or moveable electrode structures and shields within each inner container.
    Type: Application
    Filed: January 29, 2009
    Publication date: July 29, 2010
    Applicants: International Business Machines Corporation, AMD
    Inventors: Matthew J. Sendelbach, Alok Vaid, Shahin Zangooie
  • Patent number: 7760360
    Abstract: A method is provided for monitoring a photolithographic process in which a substrate is patterned to form (i) a scatterometry target having a plurality of parallel elongated features, and desirably, (ii) other features each having at least one of a microelectronic function or a micro-electromechanical function. Desirably, each elongated feature of the scatterometry target has a length in a lengthwise direction and a plurality of stress-relief features disposed at a plurality of positions along the length of each elongated feature. A return signal is detected in response to illumination of the scatterometry target. The return signal can be used to determine a result of the photolithographic process.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: July 20, 2010
    Assignee: International Business Machines Corporation
    Inventors: Charles N. Archie, Matthew J. Sendelbach
  • Publication number: 20090185168
    Abstract: Optical measurement method and systems employing a fixed polarizer are disclosed. In one embodiment, the method includes providing at least one optical detection system having a fixed polarizer having a first type polarization; providing a first target on a substrate and a second target on the substrate; optically measuring the first target and the second target using the at least one optical detection system with the first target being positioned at a right angle relative to the second target to obtain a first measurement with the first type polarization and a second measurement with a second type-equivalent polarization; and combining the first measurement and the second measurement to obtain the optical measurement.
    Type: Application
    Filed: January 21, 2008
    Publication date: July 23, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles N. Archie, Matthew J. Sendelbach, Shahin Zangooie
  • Patent number: 7453583
    Abstract: Methods and related program product for assessing and optimizing metrology instruments by determining a total measurement uncertainty (TMU) based on precision and accuracy. The TMU is calculated based on a linear regression analysis and removing a reference measuring system uncertainty (URMS) from a net residual error. The TMU provides an objective and more accurate representation of whether a measurement system under test has an ability to sense true product variation. The invention also includes a method for determining an uncertainty of the TMU.
    Type: Grant
    Filed: October 3, 2007
    Date of Patent: November 18, 2008
    Assignee: International Business Machines Corporation
    Inventors: Charles N. Archie, G. William Banke, Jr., Matthew J. Sendelbach
  • Publication number: 20080158564
    Abstract: A method is provided for monitoring a photolithographic process in which a substrate is patterned to form (i) a scatterometry target having a plurality of parallel elongated features, and desirably, (ii) other features each having at least one of a microelectronic function or a micro-electromechanical function. Desirably, each elongated feature of the scatterometry target has a length in a lengthwise direction and a plurality of stress-relief features disposed at a plurality of positions along the length of each elongated feature. A return signal is detected in response to illumination of the scatterometry target. The return signal can be used to determine a result of the photolithographic process.
    Type: Application
    Filed: June 18, 2007
    Publication date: July 3, 2008
    Inventors: Charles N. Archie, Matthew J. Sendelbach
  • Publication number: 20080151268
    Abstract: Methods and related program product for assessing and optimizing metrology instruments by determining a total measurement uncertainty (TMU) based on precision and accuracy. The TMU is calculated based on a linear regression analysis and removing a reference measuring system uncertainty (URMS) from a net residual error. The TMU provides an objective and more accurate representation of whether a measurement system under test has an ability to sense true product variation. The invention also includes a method for determining an uncertainty of the TMU.
    Type: Application
    Filed: October 3, 2007
    Publication date: June 26, 2008
    Inventors: Charles N. Archie, G. William Banker, Matthew J. Sendelbach
  • Patent number: 7286247
    Abstract: Methods and related program product for assessing and optimizing metrology instruments by determining a total measurement uncertainty (TMU) based on precision and accuracy. The TMU is calculated based on a linear regression analysis and removing a reference measuring system uncertainty (URMS) from a net residual error. The TMU provides an objective and more accurate representation of whether a measurement system under test has an ability to sense true product variation. The invention also includes a method for determining an uncertainty of the TMU.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: October 23, 2007
    Assignee: International Business Machines Corporation
    Inventors: Charles N. Archie, G. William Banke, Jr., Matthew J. Sendelbach
  • Patent number: 7265850
    Abstract: A scatterometry target is provided in which a plurality of parallel elongated features are placed, each having a length in a lengthwise direction. A plurality of stress-relief features are disposed at a plurality of positions along the length of each elongated feature.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: September 4, 2007
    Assignee: International Business Machines Corporation
    Inventors: Charles N. Archie, Matthew J. Sendelbach
  • Patent number: 7107177
    Abstract: Combining of reference measurement collections (RMCs) of at least three reference measurement systems into a weighted reference measurement collection (wRMC) is disclosed. Each RMC includes a plurality of corresponding sample measurements, each of which has a measurement value of the same sample. The invention plots corresponding measurement values to generate a plurality of data pairs for each possible RMC pairing. A best-fit line of the plurality of data pairs for each RMC pairing is then generated, and a residual for each data pair is calculated. A weight is then assigned to each sample measurement for each RMC based on the residuals associated with a respective RMC to which the sample measurement belongs, favoring a smaller residual more than a larger residual. A weighted reference measurement is then generated based on the weights, and the measurement value for the respective sample measurement for each RMC.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: September 12, 2006
    Assignee: International Business Machines Corporation
    Inventor: Matthew J. Sendelbach
  • Patent number: 6066566
    Abstract: A collar oxide is formed in a provided a semiconductor substrate having (3) a partially full trench, (2) (i) fill surface defined by fill material partially filling said trench, (ii) upper surface outside of said trench, and (iii) trench sidewall surface not covered by said fill material, and (3) a conformal oxide layer overlying said fill, upper, and sidewall surfaces, by selectively etching as follows:(a) contacting the substrate with a mixture of hydrogen-containing fluorocarbon and an oxygen source under reactive ion etching conditions until at least a portion of the conformal oxide layer on the upper surface is removed, and(b) contacting the substrate from step (a) with a mixture of a hydrogen-free fluorocarbon and a diluent gas under reactive ion etching conditions to further remove conformal oxide remaining on the fill surface and to overetch the upper and fill surfaces, whereby a substantial portion of conformal oxide remains on the side walls to form the collar oxide.
    Type: Grant
    Filed: January 28, 1998
    Date of Patent: May 23, 2000
    Assignee: International Business Machines Corporation
    Inventors: Munir-ud-Din Naeem, Matthew J. Sendelbach, Ting-Hao Wang
  • Patent number: 5976982
    Abstract: A method for preventing CMP-induced (chemical-mechanical polish) damage to a substrate disposed below a pad nitride layer of a mesa. The pad nitride layer is disposed below a conformally deposited dielectric layer. The dielectric layer is disposed below a conformally deposited polysilicon layer. The method includes planarizing the polysilicon layer down to at least a surface of the dielectric layer using the CMP to expose a first region of the dielectric layer. The method further includes etching partially through the first region of the dielectric layer using first etch parameters. The first etch parameters include an etchant source gas that is substantially selective to the pad nitride layer to prevent the pad nitride layer from being etched through even in the presence of a CMP defect. Additionally, there is also included removing the polysilicon layer after the etching partially through the first region of the dielectric layer.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: November 2, 1999
    Assignees: Siemens Aktiengesellschaft, International Business Machines Corporation
    Inventors: Max G. Levy, Wolfgang Bergner, Bernhard Fiegl, George R. Goth, Paul Parries, Matthew J. Sendelbach, Tinghao T. Wang, William C. Wille, Juergen Wittmann
  • Patent number: 5811357
    Abstract: A dry etching process for etching an oxide layer on a substrate in which a plasma is created in a gaseous mixture containing C.sub.4 F.sub.8 and C.sub.2 F.sub.6. The dry etch process is useful for etching an oxide layer stopping on a silicon nitride layer on a semiconductor wafer of an integrated circuit structure as it eliminates resist blistering without sacrificing high selectivity to nitride, via wall angle, and/or etch uniformity.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: September 22, 1998
    Assignee: International Business Machines Corporation
    Inventors: Michael D. Armacost, Tina J. Wagner, Michael L. Passow, Dominic J. Schepis, Matthew J. Sendelbach, William C. Wille