Patents by Inventor Matthew John Morley

Matthew John Morley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6920583
    Abstract: A system and method for enabling the behavior of temporal expressions to be analyzed for the evaluation of such expressions. The process of evaluating such expressions ultimately results in the construction of a finite state machine, such that the set of non-deterministic functions for describing the behavior of dynamic and relativistic systems is reduced to such a system. The behavior of the finite state machine can then be examined and analyzed. The present invention is useful for such applications as the examination of the temporal behavior of a DUT (device under test), as well as for examining the behavior of dynamic systems.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: July 19, 2005
    Assignee: Verisity Ltd.
    Inventors: Matthew John Morley, Yaron Kashai
  • Patent number: 6907599
    Abstract: A method for synthesizing a verification language, and thereby enabling the verification language to be compiled into a target language. This method enables the underlying control structure of the verification language to be determined, and then used to map the dynamic behavior of the verification language onto the target language as part of a static framework. The process of synthesizing any type of verification language causes at least a portion of the implicit control structure of the software program to be constructed into the compiled output code, such that an additional scheduler or other type of runtime system may not be required. Therefore, the compiled output code should have a greater execution speed and should be operated more efficiently than the software programs which are written in the verification language itself.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: June 14, 2005
    Assignee: Verisity Ltd.
    Inventors: Yaron Kashai, Matthew John Morley
  • Patent number: 6499132
    Abstract: A system and method for enabling the behavior of temporal expressions to be analyzed for the evaluation of such expressions. The process of evaluating such expressions ultimately results in the construction of a finite state machine, such that the set of non-deterministic functions for describing the behavior of dynamic and relativistic systems is reduced to such a system. The behavior of the finite state machine can then be examined and analyzed. The present invention is useful for such applications as the examination of the temporal behavior of a DUT (device under test), as well as for examining the behavior of dynamic systems.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: December 24, 2002
    Assignee: Verisity Ltd.
    Inventors: Matthew John Morley, Yaron Kashai