Abstract: Devices for deposition of material via organic vapor jet printing (OVJP) and similar techniques are provided. The depositor includes delivery channels ending in delivery apertures, where the delivery channels are flared as they approach the delivery apertures, and/or have a trapezoidal shape. The depositors are suitable for fabricating OLEDs and OLED components and similar devices.

Abstract: A transistor device includes a semiconductor structure comprising a channel layer and a barrier layer, source and drain contacts on the semiconductor structure, and a conductive element in a recess in the barrier layer between the source and drain contacts. The barrier layer has a first thickness adjacent the source or drain contact, a second thickness at a floor of the recess between the conductive element and the channel layer, and the first thickness is about 1.2 times to 4 times greater than the second thickness. Related methods of fabrication using a looped recess process are also discussed.

Abstract: Embodiments described herein relate to various structures, integrated assemblies, and memory devices. In some embodiments, a memory device includes a memory block region having a pillar structure, a first word line structure that extends away from the pillar structure along a first level, a second word line structure that extends away from the pillar structure along a second level, and a dielectric gas region along a third level that is between facing surfaces of the first word line structure and the second word line structure. The memory device includes a periphery region proximate the memory block region. The periphery region includes a tiered structure that includes a first nitride layer formed along the first level, a second nitride layer formed along the second level, and a semiconductor layer formed along the third level.

Abstract: Devices for deposition of material via organic vapor jet printing (OVJP) and similar techniques are provided. The depositor includes delivery channels ending in delivery apertures, where the delivery channels are flared as they approach the delivery apertures, and/or have a trapezoidal shape. The depositors are suitable for fabricating OLEDs and OLED components and similar devices.

Abstract: A transistor device includes a semiconductor structure, source and drain contacts on the semiconductor structure, a gate on the semiconductor structure between the source and drain contacts, and a surface passivation layer on the semiconductor structure between the gate and the source or drain contact. The surface passivation layer includes an opening therein that exposes a first region of the semiconductor structure for processing the first region differently than a second region of the semiconductor structure adjacent the gate. Related devices and fabrication methods are also discussed.

Abstract: Embodiments of the disclosed subject matter provide a device that may have a first depositor that includes one or more delivery apertures surrounded by one or more exhaust apertures, where the one or more delivery apertures and the one or more exhaust apertures are enclosed within a perimeter of a boss that protrudes from a substrate-facing side of the one or more delivery apertures. The delivery channels for the one or more delivery apertures and exhaust channels for the one or more exhaust apertures may be routed orthogonally to each other. The one or more delivery apertures may be configured to permit jets of delivery gas pass through a lower surface of the first depositor. The lower surface of the first depositor may include the one or more exhaust apertures to remove surplus vapor from a delivery zone. Embodiments may also provide a method of forming a print head.

Abstract: Embodiments of the disclosed subject matter provide an apparatus having a device with a micronozzle array disposed on a micro-fabricated fluidic die. The device may include a first gas distribution plate and a second opposing plate, where the micro-fabricated fluidic die is disposed between the first gas distribution plate and the second opposing plate, wherein the first gas distribution plate is irreversibly joined to the micronozzle array with a seal that is gas-tight, and where the first gas distribution plate includes a plurality of sealed flow paths. A manifold may be reversibly joined to the first gas distribution plate, where the micro-fabricated fluidic die and the first gas distribution plate and the second opposing plate are disposed between the manifold. A thermally conductive plate may have at least one window that provides a clearance fit for the device across a range of motion relative to the thermally conductive plate.

Abstract: A transistor includes a group III-Nitride channel layer; a group III-Nitride barrier layer on the group III-Nitride channel layer, the group III-Nitride barrier layer having a higher bandgap than a bandgap of the group III-Nitride channel layer; a low resistance contact layer on the group III-Nitride barrier layer and/or on the group III-Nitride channel layer; a source electrically coupled to the group III-Nitride barrier layer. A drain electrically coupled to the group III-Nitride barrier layer; and a gate on the group III-Nitride barrier layer. Additionally, at least one of the drain and the source are arranged on the low resistance contact layer.

Abstract: A semiconductor device includes a semiconductor structure comprising first and second semiconductor layers having different bandgaps, first and second contacts on the semiconductor structure and free of a gate structure therebetween, and a resistor comprising a portion of the semiconductor structure that electrically connects the first and second contacts. The portion of the semiconductor structure may be a second portion of the second semiconductor layer that is recessed in thickness relative to a first portion thereof, and/or may include a passivation layer in direct contact with the second semiconductor layer. Related devices, packages, and fabrication methods are discussed.

Abstract: Embodiments of the disclosed subject matter provide an apparatus having a device with a micronozzle array disposed on a micro-fabricated fluidic die. The device may include a first gas distribution plate and a second opposing plate, where the micro-fabricated fluidic die is disposed between the first gas distribution plate and the second opposing plate, wherein the first gas distribution plate is irreversibly joined to the micronozzle array with a seal that is gas-tight, and where the first gas distribution plate includes a plurality of sealed flow paths. A manifold may be reversibly joined to the first gas distribution plate, where the micro-fabricated fluidic die and the first gas distribution plate and the second opposing plate are disposed between the manifold. A thermally conductive plate may have at least one window that provides a clearance fit for the device across a range of motion relative to the thermally conductive plate.

Abstract: A system for manufacturing a memory device forms a memory array comprising a plurality of memory cells arranged in a plurality of memory strings along a plurality of memory array pillars, wherein respective subsets of the memory array pillars correspond to respective sub-blocks of a block of the memory array, and forms a plurality of deintegrated source segments adjacent to the memory array, wherein the source segments of the plurality of deintegrated source segments are associated with respective sub-blocks and are physically segregated from one another.

Abstract: Embodiments of the disclosed subject matter provide an apparatus having a device with a micronozzle array disposed on a micro-fabricated fluidic die. The device may include a first gas distribution plate and a second opposing plate, where the micro-fabricated fluidic die is disposed between the first gas distribution plate and the second opposing plate, wherein the first gas distribution plate is irreversibly joined to the micronozzle array with a seal that is gas-tight, and where the first gas distribution plate includes a plurality of sealed flow paths. A manifold may be reversibly joined to the first gas distribution plate, where the micro-fabricated fluidic die and the first gas distribution plate and the second opposing plate are disposed between the manifold. A thermally conductive plate may have at least one window that provides a clearance fit for the device across a range of motion relative to the thermally conductive plate.

Abstract: Systems and techniques for depositing organic material on a substrate are provided, in which one or more shield gas flows prevents contamination of the substrate by the chamber ambient. Thus, multiple layers of the same or different materials may be deposited in a single deposition chamber, without the need for movement between different deposition chambers, and with reduced chance of cross-contamination between layers.

Abstract: A wellbore environment including a downhole tool coupled with a conveyance and operable to be disposed within a wellbore, at least one strain measurement devices coupled with a surface of the downhole tool; and a control facility communicatively coupled with the at least one strain measurement device.

Abstract: The present invention relates to a fluid transport system for an automated slide treatment apparatus for treating one or more tissue samples disposed on slides, whereby the slide treatment apparatus includes a plurality of slide treatment modules arranged to receive ones of the slides, and the fluid transport system includes a fluid dispensing robot configured by a controller to dispense a plurality of reagents to said ones of the slides received in the slide treatment modules to treat said one or more tissue samples respectively.

Abstract: A transistor device may include a semiconductor structure including a channel layer and a barrier layer on the channel layer, wherein the barrier layer has a higher bandgap than the channel layer; a source contact and a drain contact on the barrier layer; a gate contact on the semiconductor structure between the source contact and the drain contact, the gate contact including a drain-side wing portion extending from a central portion of the gate contact; and a field plate on the semiconductor structure between the gate contact and the drain contact and laterally offset from the gate contact by a distance. The field plate may include a first wing portion extending from a central portion of the field plate.

Abstract: Designs and arrangements for sublimation cells are provided, which enriches an inert carrier gas with organic vapor such that the partial pressure of the organic vapor is highly stable in time. Stability is achieved by controlling the local rates of evaporation along the solid-gas interface through one or more crucibles, thereby reducing the effects of greater headspace and lowering interfacial area as the source depletes. Local evaporation rates also can be controlled using either temperature distribution or convective flow fields.

Abstract: Systems and techniques for depositing organic material on a substrate are provided, in which one or more shield gas flows prevents contamination of the substrate by the chamber ambient. Thus, multiple layers of the same or different materials may be deposited in a single deposition chamber, without the need for movement between different deposition chambers, and with reduced chance of cross-contamination between layers.

Abstract: Designs and arrangements for sublimation cells are provided, which enriches an inert carrier gas with organic vapor such that the partial pressure of the organic vapor is highly stable in time. Stability is achieved by controlling the local rates of evaporation along the solid-gas interface through one or more crucibles, thereby reducing the effects of greater headspace and lowering interfacial area as the source depletes. Local evaporation rates also can be controlled using either temperature distribution or convective flow fields.

Abstract: Example embodiments employ a selective memory swapping system for selectively placing non-volatile memory devices of a computer system offline, e.g., for background updating, and online, for use by a computer system, whereby the background updating process includes a mechanism for performing forensics analysis and updating of offline memory devices while an alternate memory device is usable by a user of the first computer system.