Patents by Inventor Matthew L. Adsitt

Matthew L. Adsitt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7596729
    Abstract: A memory device testing system includes a signal generator providing memory command, address and write data signal to write data in a memory device and then read the data from the memory device. Each item of read data is compared to the corresponding item of write data, and fail data is produced indicative of the results of the comparison. The fail data is compressed using a lossless compression scheme so that a record of the fail data can be transferred to a host in real time. The compressed fail data may be a literal record that specifies the value of consecutively repeating fail data as well as the number of times the fail data repeats. The fail data may also be a record specifying the literal records in a repeating sequence of literal records as well as the number of times the sequence repeats.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: September 29, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Matthew L. Adsitt
  • Patent number: 7454671
    Abstract: A memory device test system includes a signal generator providing memory command, address and write data signal to write data in a memory device and then read the data from the memory device. Each item of read data is compared to the corresponding item of write data, and fail data is produced indicative of the results of the comparison. The fail data is applied to a real time repair analyzer, which also receives an address of the read data being read to generate each item of fail data. The addresses are captured responsive to respective fail data signals to provide a record of the block, column and bit of each word of data read from a defective memory cell. The addresses are accumulated while the data are read from the memory device during testing so that a repair solution is available virtually as soon as the test has been completed.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: November 18, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Matthew L. Adsitt
  • Publication number: 20080005630
    Abstract: A memory device testing system includes a signal generator providing memory command, address and write data signal to write data in a memory device and then read the data from the memory device. Each item of read data is compared to the corresponding item of write data, and fail data is produced indicative of the results of the comparison. The fail data is compressed using a lossless compression scheme so that a record of the fail data can be transferred to a host in real time. The compressed fail data may be a literal record that specifies the value of consecutively repeating fail data as well as the number of times the fail data repeats. The fail data may also be a record specifying the literal records in a repeating sequence of literal records as well as the number of times the sequence repeats.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Inventor: Matthew L. Adsitt