Patents by Inventor Matthew L. Bibee

Matthew L. Bibee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7761276
    Abstract: Various port reduction methods are employed to reduce the number of port definitions in a simulation file. A ground port reduction method is first employed to reduce certain power supply reference connections to an absolute ground reference for the circuit model. Next, all commonly defined port definitions are combined into a single port definition. Finally, a current analysis is used to further reduce the number of port definitions in the simulation file by removing the current return ports from the simulation file.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: July 20, 2010
    Assignee: Xilinx, Inc.
    Inventors: Michael J. Degerstrom, Matthew L. Bibee
  • Patent number: 7535321
    Abstract: A printed circuit board (PCB) embedded filter is utilized to provide a low-pass filter characteristic using minimal lumped circuit elements. Microstrips extend on top layer of the PCB to conductive vias to form a first series connected inductive element, while microstrips extend from conductive vias to conductive vias to form a second series connected inductive element. Shunt capacitance is employed on a lower layer using striplines extending outwardly and symmetrically from conductive vias. An absorption circuit is implemented using microstrips on back layer of the PCB and capacitive plates on inner layers of the PCB. A surface mount resistor may be installed between pads to complete the absorption circuit.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: May 19, 2009
    Assignee: XILINX, Inc.
    Inventors: Michael J. Degerstrom, Matthew L. Bibee
  • Patent number: 7505512
    Abstract: A method and apparatus for combining statistical eye channel compliance methods with linear continuous-time equalization. A set of equalizer parameters is processed with measured channel parameters to create a set of modified parameters that are then used with a statistical eye algorithm. This technique allows for the addition of linear continuous-time equalization with or without modification of the existing statistical eye algorithm.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: March 17, 2009
    Assignee: Xilinx , Inc.
    Inventors: Stephen D. Anderson, Matthew L. Bibee
  • Patent number: 7468894
    Abstract: The embodiments of the present invention relate to an improved printed circuit board having additional rows of ground vias to reduce crosstalk in the board. A printed circuit board according to one embodiment of the present invention comprises a first row of vias and a second row of vias, each having a plurality of signal vias. The circuit board also comprises a plurality of rows of vias being coupled to a ground plane between the first row of signal vias and the second row of signal vias. According to one embodiment, the plurality of rows of vias being coupled to a ground plane comprise rows of vias having different sizes. Some of the vias are designed to receive a component, while others are generally smaller and designed to provide a return current path for the signal vias.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: December 23, 2008
    Assignee: XILINX, Inc.
    Inventor: Matthew L. Bibee
  • Patent number: 7426235
    Abstract: Circuitry for equalizing a high data rate serial data stream that receives low frequency and high frequency test tones, accurately measures an amount of attenuation experienced by the high frequency test tone in relation to the low frequency test tone, and accordingly, produces equalization data that results in a corresponding amount of equalization or pre-emphasis being added to an outgoing signal. More specifically, however, the present invention includes both open loop and closed loop systems for equalizing or adding pre-emphasis to a signal with attenuation. In the open loop transceiver system, a presumption is made that an amount of attenuation in both the outgoing and ingoing directions are equal. In the closed loop transceiver system, a receiver determines an amount of equalization and produces the equalization data to a remote transceiver.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: September 16, 2008
    Assignee: Xilinx, Inc.
    Inventors: Stephen D. Anderson, David E. Tetzlaff, Michael J. Gaboury, Matthew L. Bibee
  • Patent number: 7348597
    Abstract: Various apparatus for performing high frequency electronic package testing are disclosed. A test fixture assembly includes an electronics package having an interface structure, a mock-up IC, coupled to the interface structure for providing circuit connections, and a fixture board, coupled to the interface structure, wherein at least one of the fixture board and mock-up IC includes high frequency probe pads for providing a signal and ground point for high bandwidth test probing. Raw measurements are used for validation of the electronic package specifications when adequate test fixture bandwidth is available or included into circuit simulations models when a minimal phase error is acceptable, else phase and loss corrections are applied to the measurements.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: March 25, 2008
    Assignee: Xilinx, Inc.
    Inventors: Michael J. Degerstrom, Matthew L. Bibee, Daniel V. Hulse
  • Patent number: 7239526
    Abstract: The embodiments of the present invention relate to an improved printed circuit board having additional rows of ground vias to reduce crosstalk in the board. A printed circuit board according to one embodiment of the present invention comprises a first row of vias and a second row of vias, each having a plurality of signal vias. The circuit board also comprises a plurality of rows of vias being coupled to a ground plane between the first row of signal vias and the second row of signal vias. According to one embodiment, the plurality of rows of vias being coupled to a ground plane comprise rows of vias having different sizes. Some of the vias are designed to receive a component, while others are generally smaller and designed to provide a return current path for the signal vias.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: July 3, 2007
    Assignee: Xilinx, Inc.
    Inventor: Matthew L. Bibee
  • Patent number: 7132899
    Abstract: A method and apparatus for providing a high speed buffer with high gain bandwidth and rail-to-rail operation is disclosed. Resistor-capacitor (RC) filters are added in current mirrors that are in the signal path. The effect of these filters is to create a frequency-dependent impedance that extends the gain bandwidth of the circuit.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: November 7, 2006
    Assignee: Xilinx, Inc.
    Inventors: Michael J. Gaboury, Matthew L. Bibee