Abstract: A method of balancing input/output (I/O) device interrupt service loading in a computer system comprises: assigning priorities to a plurality of I/O device interrupts of a processing unit of the computer system; servicing the plurality of interrupts according to the assigned priorities thereof; collecting data on the interrupt servicing of the plurality of interrupts over a time interval; reassigning the priorities of the plurality of interrupts based on the collected interrupt service data; and repeating the collecting and reassigning steps to balance input/output (I/O) device interrupt service loading of the processing unit.

Abstract: A method of balancing input/output (I/O) device interrupt service loading in a computer system comprises: assigning priorities to a plurality of I/O device interrupts of a processing unit of the computer system; servicing the plurality of interrupts according to the assigned priorities thereof; collecting data on the interrupt servicing of the plurality of interrupts over a time interval; reassigning the priorities of the plurality of interrupts based on the collected interrupt service data; and repeating the collecting and reassigning steps to balance input/output (I/O) device interrupt service loading of the processing unit.

Abstract: A computer-implemented method for handling pending interrupt vectors of a pending interrupt list is disclosed. The method includes batch-reading the set of pending interrupt vectors into a working list of working interrupt vectors. The method also includes performing interrupt handling of the working interrupt vectors using an interrupt handling arrangement until the working list is empty. The interrupt handling process permits a first incoming interrupt vector that is received by the pending interrupt list after the batch reading to temporarily interrupt the performing interrupt handling of the working interrupt vectors and to be handled on a priority basis by the interrupt handling arrangement if a priority level of the first incoming interrupt vector is higher than a priority level of a first working interrupt vector being currently handled by the interrupt handling arrangement.